From 0f3b8944269034bab18760053346ae1cdcf82d51 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 7 Jun 2016 10:54:28 +0800 Subject: sunxi: Make CPUCFG_BASE macro names the same across families Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai Acked-by: Marc Zyngier Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 16 ++++++++-------- arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 8 ++++---- 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/arm/cpu') diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S index 90b5bfd359..9752550dea 100644 --- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S +++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S @@ -73,8 +73,8 @@ psci_fiq_enter: lsr r9, r9, #10 and r9, r9, #0xf - movw r8, #(SUN6I_CPUCFG_BASE & 0xffff) - movt r8, #(SUN6I_CPUCFG_BASE >> 16) + movw r8, #(SUNXI_CPUCFG_BASE & 0xffff) + movt r8, #(SUNXI_CPUCFG_BASE >> 16) @ Wait for the core to enter WFI lsl r11, r9, #6 @ x64 @@ -114,8 +114,8 @@ psci_fiq_enter: str r10, [r12, #0x140] #endif - movw r8, #(SUN6I_CPUCFG_BASE & 0xffff) - movt r8, #(SUN6I_CPUCFG_BASE >> 16) + movw r8, #(SUNXI_CPUCFG_BASE & 0xffff) + movt r8, #(SUNXI_CPUCFG_BASE >> 16) @ Unlock CPU ldr r10, [r8, #0x1e4] @@ -139,8 +139,8 @@ psci_cpu_on: str r2, [r0] @ store target PC at stack top dsb - movw r0, #(SUN6I_CPUCFG_BASE & 0xffff) - movt r0, #(SUN6I_CPUCFG_BASE >> 16) + movw r0, #(SUNXI_CPUCFG_BASE & 0xffff) + movt r0, #(SUNXI_CPUCFG_BASE >> 16) @ CPU mask and r1, r1, #3 @ only care about first cluster @@ -189,8 +189,8 @@ psci_cpu_on: str r6, [r0, #0x100] @ re-calculate CPU control register address - movw r0, #(SUN6I_CPUCFG_BASE & 0xffff) - movt r0, #(SUN6I_CPUCFG_BASE >> 16) + movw r0, #(SUNXI_CPUCFG_BASE & 0xffff) + movt r0, #(SUNXI_CPUCFG_BASE >> 16) @ Deassert reset on target CPU mov r6, #3 diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S index e15d587f29..ac8ebf888a 100644 --- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S +++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S @@ -73,8 +73,8 @@ psci_fiq_enter: lsr r9, r9, #10 and r9, r9, #0xf - movw r8, #(SUN7I_CPUCFG_BASE & 0xffff) - movt r8, #(SUN7I_CPUCFG_BASE >> 16) + movw r8, #(SUNXI_CPUCFG_BASE & 0xffff) + movt r8, #(SUNXI_CPUCFG_BASE >> 16) @ Wait for the core to enter WFI lsl r11, r9, #6 @ x64 @@ -128,8 +128,8 @@ psci_cpu_on: str r2, [r0] @ store target PC at stack top dsb - movw r0, #(SUN7I_CPUCFG_BASE & 0xffff) - movt r0, #(SUN7I_CPUCFG_BASE >> 16) + movw r0, #(SUNXI_CPUCFG_BASE & 0xffff) + movt r0, #(SUNXI_CPUCFG_BASE >> 16) @ CPU mask and r1, r1, #3 @ only care about first cluster -- cgit v1.2.1