From e2132c29d8f445185bd87a7aeb297a285e0d9bfe Mon Sep 17 00:00:00 2001
From: Tom Warren <twarren.nvidia@gmail.com>
Date: Tue, 6 Dec 2011 13:00:19 +0000
Subject: arm: Tegra: fix undefined instruction hang immediately after reset

commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't
execute on Tegra, due to the AVP (ARM7TDI) not having a CP15.
Result was an undefined instruction hang just after reset.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Acked-by: Aneesh V <aneesh@ti.com>
---
 arch/arm/cpu/armv7/start.S | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'arch/arm/cpu/armv7/start.S')

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 6a77c71e1d..ef08a55abc 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -132,6 +132,7 @@ reset:
 	orr	r0, r0, #0xd3
 	msr	cpsr,r0
 
+#if !defined(CONFIG_TEGRA2)
 /*
  * Setup vector:
  * (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -147,6 +148,7 @@ reset:
 	ldr	r0, =_start
 	mcr	p15, 0, r0, c12, c0, 0	@Set VBAR
 #endif
+#endif	/* !Tegra2 */
 
 	/* the mask ROM code should have PLL and others stable */
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
-- 
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