From c218f85ea18d57beecc36a3460f08e929d81fcd6 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 30 Mar 2015 17:01:04 -0500 Subject: arm: socfpga: add functions to bring sdram, timer, and uart out of reset These functions will be needed for use by the SPL for enabling the console and sdram initialization. Signed-off-by: Dinh Nguyen Acked-by: Marek Vasut Acked-by: Pavel Machek --- arch/arm/cpu/armv7/socfpga/reset_manager.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/cpu/armv7/socfpga') diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c b/arch/arm/cpu/armv7/socfpga/reset_manager.c index 25921e76c4..45b352bdfc 100644 --- a/arch/arm/cpu/armv7/socfpga/reset_manager.c +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c @@ -113,3 +113,27 @@ void socfpga_spim_enable(void) clrbits_le32(reset, (1 << RSTMGR_PERMODRST_SPIM0_LSB) | (1 << RSTMGR_PERMODRST_SPIM1_LSB)); } + +/* Bring UART0 out of reset. */ +void socfpga_uart0_enable(void) +{ + const void *reset = &reset_manager_base->per_mod_reset; + + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_UART0_LSB); +} + +/* Bring SDRAM controller out of reset. */ +void socfpga_sdram_enable(void) +{ + const void *reset = &reset_manager_base->per_mod_reset; + + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_SDR_LSB); +} + +/* Bring OSC1 timer out of reset. */ +void socfpga_osc1timer_enable(void) +{ + const void *reset = &reset_manager_base->per_mod_reset; + + clrbits_le32(reset, 1 << RSTMGR_PERMODRST_OSC1TIMER0_LSB); +} -- cgit v1.2.1