From cecf2db23b256d84ed54e1442b646f07373e5caa Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Fri, 20 Feb 2015 13:27:18 +0530 Subject: Exynos542x: Fix secondary core booting for thumb When compiled SPL for Thumb secondary cores failed to boot at the kernel boot up. Only one core came up out of 4. This was happening because the code relocated to the address 0x02073000 by the primary core was an ARM asm code which was executed by the secondary cores as if it was a thumb code. This patch fixes the issue of secondary cores considering relocated code as Thumb instructions and not ARM instructions by jumping to the relocated with the help of "bx" ARM instruction. "bx" instruction changes the 5th bit of CPSR which allows execution unit to consider the following instructions as ARM instructions. Signed-off-by: Akshay Saraswat Reviewed-by: Simon Glass Tested-by: Simon Glass Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/lowlevel_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv7/exynos') diff --git a/arch/arm/cpu/armv7/exynos/lowlevel_init.c b/arch/arm/cpu/armv7/exynos/lowlevel_init.c index 050457641e..782ecd1115 100644 --- a/arch/arm/cpu/armv7/exynos/lowlevel_init.c +++ b/arch/arm/cpu/armv7/exynos/lowlevel_init.c @@ -89,7 +89,7 @@ static void secondary_cpu_start(void) { v7_enable_smp(EXYNOS5420_INFORM_BASE); svc32_mode_en(); - set_pc(CONFIG_EXYNOS_RELOCATE_CODE_BASE); + branch_bx(CONFIG_EXYNOS_RELOCATE_CODE_BASE); } /* -- cgit v1.2.1