From a276172cf32386c211c75638f6bf3c0d59ba03ba Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Thu, 8 Jan 2015 16:50:21 +0900 Subject: arm: exynos: fix the div value for set_mmc_clk The most exynos used the "Ratio + 1" as div value. And value at register is "Ratio". So if want to set exact value, it needs to subtract one. Value at register ("Ratio") = div - 1 Signed-off-by: Jaehoon Chung Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/exynos/clock.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/cpu/armv7/exynos') diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index b31c13b14b..3110bb0657 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -1656,6 +1656,10 @@ unsigned long get_mmc_clk(int dev_index) void set_mmc_clk(int dev_index, unsigned int div) { + /* If want to set correct value, it needs to substract one from div.*/ + if (div > 0) + div -= 1; + if (cpu_is_exynos5()) { if (proid_is_exynos5420() || proid_is_exynos5800()) exynos5420_set_mmc_clk(dev_index, div); -- cgit v1.2.1