From 4d013d8fa8863efb2d4264e1245a61a1a473c80c Mon Sep 17 00:00:00 2001 From: Steve Rae Date: Tue, 9 Dec 2014 11:40:11 -0800 Subject: bcm281xx: add support for "USB OTG clock" enable this clock with the following: clk_usb_otg_enable((void *)HSOTG_BASE_ADDR) Signed-off-by: Steve Rae Reviewed-by: Felipe Balbi --- arch/arm/cpu/armv7/bcm281xx/Makefile | 1 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 16 ++++++++++++++++ arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c | 27 +++++++++++++++++++++++++++ 3 files changed, 44 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c (limited to 'arch/arm/cpu/armv7/bcm281xx') diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile b/arch/arm/cpu/armv7/bcm281xx/Makefile index bd867a2718..f24aeb3826 100644 --- a/arch/arm/cpu/armv7/bcm281xx/Makefile +++ b/arch/arm/cpu/armv7/bcm281xx/Makefile @@ -10,3 +10,4 @@ obj-y += clk-bcm281xx.o obj-y += clk-sdio.o obj-y += clk-bsc.o obj-$(CONFIG_BCM_SF2_ETH) += clk-eth.o +obj-y += clk-usb-otg.o diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c index d16b99fc23..7e25255230 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c @@ -209,6 +209,10 @@ static struct peri_clk_data sdio4_sleep_data = { .gate = SW_ONLY_GATE(0x0360, 20, 4), }; +static struct bus_clk_data usb_otg_ahb_data = { + .gate = HW_SW_GATE_AUTO(0x0348, 16, 0, 1), +}; + static struct bus_clk_data sdio1_ahb_data = { .gate = HW_SW_GATE_AUTO(0x0358, 16, 0, 1), }; @@ -331,6 +335,17 @@ static struct ccu_clock esub_ccu_clk = { */ /* KPM bus clocks */ +static struct bus_clock usb_otg_ahb_clk = { + .clk = { + .name = "usb_otg_ahb_clk", + .parent = &kpm_ccu_clk.clk, + .ops = &bus_clk_ops, + .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR, + }, + .freq_tbl = master_ahb_freq_tbl, + .data = &usb_otg_ahb_data, +}; + static struct bus_clock sdio1_ahb_clk = { .clk = { .name = "sdio1_ahb_clk", @@ -541,6 +556,7 @@ struct clk_lookup arch_clk_tbl[] = { CLK_LK(bsc2), CLK_LK(bsc3), /* Bus clocks */ + CLK_LK(usb_otg_ahb), CLK_LK(sdio1_ahb), CLK_LK(sdio2_ahb), CLK_LK(sdio3_ahb), diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c new file mode 100644 index 0000000000..1d7c5af76d --- /dev/null +++ b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c @@ -0,0 +1,27 @@ +/* + * Copyright 2014 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include "clk-core.h" + +/* Enable appropriate clocks for the USB OTG port */ +int clk_usb_otg_enable(void *base) +{ + char *ahbstr; + + switch ((u32) base) { + case HSOTG_BASE_ADDR: + ahbstr = "usb_otg_ahb_clk"; + break; + default: + printf("%s: base 0x%p not found\n", __func__, base); + return -EINVAL; + } + + return clk_get_and_enable(ahbstr); +} -- cgit v1.2.1