From fa6c7413d1d5256516aad30b97eba3e4094c7ea3 Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Sun, 19 May 2013 01:48:14 +0000 Subject: arm: do not compile relocate_code() for SPL builds MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Albert ARIBAUD Reviewed-by: Benoît Thébaudeau Tested-by: Simon Glass --- arch/arm/cpu/arm926ejs/start.S | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'arch/arm/cpu/arm926ejs/start.S') diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 4c5671109d..d5c4ab21cf 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -136,10 +136,6 @@ _TEXT_BASE: _bss_start_ofs: .word __bss_start - _start -.globl _image_copy_end_ofs -_image_copy_end_ofs: - .word __image_copy_end - _start - .globl _bss_end_ofs _bss_end_ofs: .word __bss_end - _start @@ -190,6 +186,7 @@ reset: /*------------------------------------------------------------------------------*/ +#ifndef CONFIG_SPL_BUILD /* * void relocate_code(addr_moni) * @@ -212,7 +209,6 @@ copy_loop: cmp r0, r2 /* until source end address [r2] */ blo copy_loop -#ifndef CONFIG_SPL_BUILD /* * fix .rel.dyn relocations */ @@ -250,14 +246,13 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop -#endif relocate_done: bx lr -#ifndef CONFIG_SPL_BUILD - +_image_copy_end_ofs: + .word __image_copy_end - _start _rel_dyn_start_ofs: .word __rel_dyn_start - _start _rel_dyn_end_ofs: -- cgit v1.2.1