From 028dbb8db1d18c5835ab34659f9ef7a516571524 Mon Sep 17 00:00:00 2001 From: Ruchika Gupta Date: Tue, 9 Sep 2014 11:50:31 +0530 Subject: fsl_sec : Change accessor function to take care of endianness SEC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of SEC IP. So update acessor functions with common SEC acessor functions to take care both type of endianness. Signed-off-by: Ruchika Gupta Reviewed-by: York Sun --- README | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'README') diff --git a/README b/README index 46def0086b..19abe20035 100644 --- a/README +++ b/README @@ -544,6 +544,12 @@ The following options need to be configured: CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS Number of controllers used for other than main memory. + CONFIG_SYS_FSL_SEC_BE + Defines the SEC controller register space as Big Endian + + CONFIG_SYS_FSL_SEC_LE + Defines the SEC controller register space as Little Endian + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO -- cgit v1.2.1