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* cros_ec: Support the LDO access method used by springSimon Glass2015-08-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Add a driver to support the special LDO access used by spring. This is a custom method in the cros_ec protocol - it does not use an I2C pass-through. There are two implementation choices: 1. Write a special LDO driver which can talk across the EC. Duplicate all the logic from TPS65090 for retrying when the LDO fails to come up. 2. Write a special I2C bus driver which pretends to be a TPS65090 and transfers reads and writes using the LDO message. Either is distasteful. The latter method is chosen since it results in less code duplication and a fairly simple (30-line) implementation of the core logic. The crosec 'ldo' subcommand could be removed (since i2c md/mw will work instead) but is retained as a convenience. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: cros_ec: Convert the I2C tunnel code to use driver modelSimon Glass2015-08-051-2/+12
| | | | | | | | | | | | | | | | | | | The Chrome OS EC supports tunnelling through to an I2C bus on the EC. This currently uses a copy of the I2C command code and a special 'crosec' sub-command. With driver model we can define an I2C bus which tunnels through to the EC, and use the normal 'i2c' command to access it. This simplifies the code and removes some duplication. Add an I2C driver which tunnels through to the EC. Adjust the EC code to support binding child devices so that it can be set up. Adjust the existing I2C xfer function to fit driver model better. For now the old code remains to allow things to still work. It will be removed in a later patch once the new flow is fully enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add support for multiplexed I2C busesSimon Glass2015-08-052-0/+40
| | | | | | | | | | | | | | | | | Add a new I2C_MUX uclass. Devices in this class can multiplex between several I2C buses, selecting them one at a time for use by the system. The multiplexing mechanism is left to the driver to decide - it may be controlled by GPIOs, for example. The uclass supports only two methods: select() and deselect(). The current mux state is expected to be stored in the mux itself since it is the only thing that knows how to make things work. The mux can record the current state and then avoid switching unless it is necessary. So select() can be skipped if the mux is already in the correct state. Also deselect() can be made a nop if required. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add a function to transfer messagesSimon Glass2015-08-051-0/+13
| | | | | | | | | | | Sometimes it is useful to be able to transfer a raw I2C message. This happens when the chip address needs to be set manually, or when the data to be sent/received is in another buffer. Add a function to provide access to this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Move definitions to the top of the header fileSimon Glass2015-08-051-43/+43
| | | | | | | | Move the flags and struct definitions higher in the file so that we can reference them with functions declared in the driver model section. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Correct comment nits in dm_i2c_reg_read/write()Simon Glass2015-08-051-0/+2
| | | | | | | Add documentation for the @dev parameter. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Add a message debug functionSimon Glass2015-08-051-0/+10
| | | | | | | Add a way to dump the contents of an I2C message for debugging purposes. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: core: Support finding a device by phandleSimon Glass2015-08-051-0/+17
| | | | | | | | | It is common for one node to reference another via a phandle. Add support for obtaining an attached device by this method. As an example, a node may have a 'power-supply' property which references a regulator, allowing the driver to turn on its power. Signed-off-by: Simon Glass <sjg@chromium.org>
* configs: Remove CONFIG_SERIAL_MULTIStephen Warren2015-08-0516-16/+0
| | | | | | | This config option isn't used anywhere at all. Remove all places that define/enable the option. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-08-0516-35/+736
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| * efi: Add 64-bit payload supportSimon Glass2015-08-051-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Most EFI implementations use 64-bit. Add a way to build U-Boot as a 64-bit EFI payload. The payload unpacks a (32-bit) U-Boot and starts it. This can be enabled for x86 boards at present. Signed-off-by: Simon Glass <sjg@chromium.org> Improvements to how the payload is built: Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * efi: Add support for loading U-Boot through an EFI stubSimon Glass2015-08-052-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to be able to load U-Boot onto a board even if is it already running EFI. This can allow access to the U-Boot command interface, flexible booting options and easier development. The easiest way to do this is to build U-Boot as a binary blob and have an EFI stub copy it into RAM. Add support for this feature, targeting 32-bit initially. Also add a way to detect when U-Boot has been loaded via a stub. This goes in common.h since it needs to be widely available so that we avoid redoing initialisation that should be skipped. Signed-off-by: Simon Glass <sjg@chromium.org> Improvements to how the payload is built: Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Add definitions for the x86-efi board and plumb it inBen Stoltz2015-08-051-0/+34
| | | | | | | | | | | | | | | | Add configuration and Kconfig changes for this board. Signed-off-by: Ben Stoltz <stoltz@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * Add a way to skip relocationSimon Glass2015-08-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | When running U-Boot as an EFI application we cannot relocate since we do not have relocation information. U-Boot has already been relocated to a suitable address. Add a global_data flag to control skipping relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: minnowmax: Drop the old PCI settingsSimon Glass2015-08-051-12/+0
| | | | | | | | | | | | | | | | These are now in the device tree so we don't need to use the CONFIG options. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Drop CONFIG_DCACHE_RAM_MRC_VAR_SIZE from header fileSimon Glass2015-08-051-1/+0
| | | | | | | | | | | | | | This is provided in Kconfig so we don't need it here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Move CONFIG_X86_SERIAL to KconfigSimon Glass2015-08-056-10/+1
| | | | | | | | | | | | | | Move this config option to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Move Chrome OS options to defconfigSimon Glass2015-08-051-3/+0
| | | | | | | | | | | | | | Drop these from the header file and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: Add a return value comment to device_get_child()Simon Glass2015-08-051-1/+3
| | | | | | | | | | | | | | At present this function does not specify its return value. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * pci: Add a constant for an invalid interruptSimon Glass2015-08-051-0/+2
| | | | | | | | | | | | | | Rather than using 0xff in the code, add a constant. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * efi: Add start-up library codeSimon Glass2015-08-053-7/+602
| | | | | | | | | | | | | | | | | | | | | | When running as an EFI application, U-Boot must request memory from EFI, and provide access to the boot services U-Boot needs. Add library code to perform these tasks. This includes efi_main() which is the entry point from EFI. U-Boot is built as a shared library. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * Reserve the top 16 flag bits for architecture-specific useSimon Glass2015-08-051-1/+1
| | | | | | | | | | | | | | | | | | Add a convention that the generic global_data only occupy the bottom 16 bits of the flags word, so that there is less chance of a conflict. At present the x86 flags conflict. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * Bring in __aligned_u64 and friends to linux/types.hSimon Glass2015-08-051-1/+5
| | | | | | | | | | | | | | | | These will be used for efi.h both for U-Boot running as an EFI application and as a payload. They come from Linux 4.1. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * elf: Add a few definitions for 64-bit relocationSimon Glass2015-08-051-0/+26
| | | | | | | | | | | | | | Provide the types necessary to relocate 64-bit images. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: bayleybay: Configure PCI IRQBin Meng2015-08-051-0/+1
| | | | | | | | | | | | | | | | Add PCI IRQ routing information in the board device tree and enable writing PIRQ routing table and MP table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Add Intel Bayley Bay board supportBin Meng2015-08-051-0/+45
| | | | | | | | | | | | | | | | Intel Bayley Bay board is a BayTrail based board. Add this board with existing baytrail fsp support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: minnowmax: Remove smsc47x superio codesBin Meng2015-08-051-2/+0
| | | | | | | | | | | | | | | | | | On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated into the SoC which is enabled by the FSP. Remove the smsc47x superio initialization codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | sunxi: MUSB gadget config provisions, with fastboot and USB mass storage supportPaul Kocialkowski2015-08-051-0/+30
| | | | | | | | | | | | | | This adds some config options to the sunxi-common config to enable the USB download gadget and the fastboot and USB mass storage functions. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | sunxi: config update to stick with Kconfig changesPaul Kocialkowski2015-08-051-3/+2
| | | | | | | | | | | | | | Now that some things were updated in Kconfig, they should be reflected on the sunxi-common config too. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | usb: musb-new: CONFIG_MUSB prefix replacement with CONFIG_USB_MUSBPaul Kocialkowski2015-08-0530-112/+112
|/ | | | | | | | | USB-related options are usually prefixed with CONFIG_USB and platform-specific adaptation for the MUSB controller already have a CONFIG_USB_MUSB prefix, so this switches all MUSB-related options to a CONFIG_USB_MUSB prefix, for consistency. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-08-0414-101/+401
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| * armv8/ls2085ardb: Add USB support for ls2085ardbNikhil Badola2015-08-031-0/+13
| | | | | | | | | | | | | | Add USB XHCI support for ls2085rdb platform Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls2085aqds: Add USB support for ls2085aqdsNikhil Badola2015-08-031-0/+13
| | | | | | | | | | | | | | Add USB XHCI support for ls2085qds platform Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers/ddr/fsl: Adjust bstopre valueYork Sun2015-08-031-1/+1
| | | | | | | | | | | | | | | | | | By default the bstopre value has been set to 0x100, used to be 1/4 value of refint. Modern DDR has increased the refresh time. Adjust to 1/4 of refresh interval dynamically. Individual board can still override this value in board ddr file, or to use auto-precharge. Signed-off-by: York Sun <yorksun@freescale.com>
| * drivers/pci: Add function to find an extended capabilityMinghuan Lian2015-08-031-0/+41
| | | | | | | | | | | | | | | | | | | | PCIe extends device's configuration space to 4k and provides extended capability. The patch adds function to find them. The code is ported from Linux PCIe driver. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers/fsl-mc: flib changes for mc 8.0.0Prabhakar Kushwaha2015-08-036-92/+310
| | | | | | | | | | | | | | | | | | MC firware version 8.0.0 contains new command flags. This patch contains modifications in FLIB files to support the new command flags. Signed-off-by: Itai Katz <itai.katz@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers/crypto/fsl: enable raw data instead of von Neumann dataAlex Porosanu2015-08-031-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | The sampling of the oscillator can be done in multiple modes for generating the entropy value. By default, this is set to von Neumann. This patch changes the sampling to raw data, since it has been discovered that the generated entropy has a better 'quality'. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers/crypto/fsl: change starting entropy delay valueAlex Porosanu2015-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The entropy delay (the length in system clocks of each entropy sample) for the RNG4 block of CAAM is dependent on the frequency of the SoC. By elaborate methods, it has been determined that a good starting value for all platforms integrating the CAAM IP is 3200. Using a higher value has additional benefit of speeding up the process of instantiating the RNG, since the entropy delay will be increased and instantiation of the RNG state handles will be reattempted by the driver. If the starting value is low, for certain platforms, this can lead to a quite lengthy process. This patch changes the starting value of the length of the entropy sample to 3200 system clocks. In addition to this change, the attempted entropy delay values are now printed on the console upon initialization of the RNG block. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers/crypto/fsl: disable RNG oscillator maximum frequency checkAlex Porosanu2015-08-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the oscillator, when SEC runs at its maximum frequency. For certain platforms (f.i. T2080), the oscillator is very fast and thus if the SEC runs at a lower than normal frequency, the ring oscillator is incorrectly detected as being out of bounds. This patch effectively disables the maximum frequency check, by setting a high enough maximum allowable frequency for the oscillator. The reasoning behind this is that usually a broken oscillator will run too slow (i.e. not run at all) rather than run too fast. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv7/ls1021a/etsec: Enable Tx Data and TxBD snoopingAlison Wang2015-08-031-4/+0
| | | | | | | | | | | | | | | | | | To improve eTSEC performance on LS1021A Rev2.0, snooping of all transmit frames from memory and all transmit BD memory accesses in enabled. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv7/ls1021atwr: added deep sleep support in ubootTang Yuantian2015-08-031-1/+10
| | | | | | | | | | | | Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv7/lS1021atwr: Enable bootscript for secure bootgaurav rana2015-08-031-0/+1
| | | | | | | | | | | | | | | | Enable bootscript support in secure boot for establishing chain of trust on LS1021atwr. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv7/ls1021a: Reserve secure code into RAM instead of OCRAMZhuoyu Zhang2015-08-032-2/+0
| | | | | | | | | | | | | | | | | | For ls1021a, Reserve secure code in to memory in case OCRAM is needed by other usage. Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | configs: ti_armv7_keystone2: replace addr_uboot with loadaddrVitaly Andrianov2015-08-031-3/+3
|/ | | | | | | | | This patch replaces not existing addr_uboot environment variable by loadaddr at get_uboot_net and burn_uboot_xxx commands. Otherwise these commands are broken. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-08-0226-148/+539
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| * imx: mx6ul_14x14_evk add basic board supportPeng Fan2015-08-021-0/+227
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add USDHC, I2C, UART, 74LV, USB, QSPI support. 2. Support SPL 3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default supports sd for usdhc2, but can do hardware rework to make usdhc2 support emmc. Boot Log: U-Boot SPL 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59 +0800) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C)CPU: Thermal invalid data, fuse: 0x0 - invalid sensor device Reset cause: POR Board: MX6UL 14x14 EVK I2C: ready DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * imx: imx6_spl add mx6ul supportPeng Fan2015-08-021-1/+1
| | | | | | | | | | | | | | i.MX6UL's DRAM space starts from 0x80000000, same to i.MX6SX, so use same address with i.MX6SX. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * mx6_common: Fix LOADADDR and SYS_TEXT_BASE for i.MX6ULPeng Fan2015-08-021-1/+1
| | | | | | | | | | | | | | DRAM space starts from 0x80000000 for i.MX6UL, so need to fix LOADADDR, SYS_TEXT_BASE. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * imx: mx6ul remove errata for i.MX6ULPeng Fan2015-08-021-1/+3
| | | | | | | | | | | | | | | | Since i.MX6UL use A7 core, but not A9 core, we do not need the erratas for i.MX6UL. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * sf: kconfig: add kconfig options for spi flashesNikita Kiryanov2015-08-021-8/+0
| | | | | | | | | | | | | | | | | | | | Add kconfig options for various SPI flashes and use them in cm-fx6 defconfig. Cc: Jagan Teki <jteki@openedev.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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