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* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-07-2939-329/+660
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| * ARM: convert arch_fixup_memory_node to a generic FDT fixup functionMa Haijun2014-07-281-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Some architecture needs extra device tree setup. Instead of adding yet another hook, convert arch_fixup_memory_node to be a generic FDT fixup function. [maz: collapsed 3 patches into one, rewrote commit message] Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-2828-323/+387
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| | * ARM: omap: move board specific NAND configs out from ti_armv7_common.hpekon gupta2014-07-258-8/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves some board specific NAND configs: - FROM: generic config file 'ti_armv7_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * ARM: omap: clean redundant PISMO_xx macros used in OMAP3pekon gupta2014-07-2517-76/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PISMO_xx macros were used to define 'Platform Independent Storage MOdule' related GPMC configurations. This patch - Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided by current u-boot infrastructure. - Removes unused redundant macros, which are no longer required after merging of common platform code in following commit commit a0a37183bd75e74608bc78c8d0e2a34454f95a91 ARM: omap: merge GPMC initialization code for all platform +-----------------+-----------------------------------------------------------+ | Macro | Reason for removal | +-----------------+-----------------------------------------------------------+ | PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so | | | configuring GPMC chip-select for smallest allowable | | | segment (GPMC_SIZE_16M) is enough. | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of | | | 128MB (GPMC_SIZE_128M) | +-----------------+-----------------------------------------------------------+ +-----------------+-----------------------------------------------------------+ | PISMO1_NOR | Unused Macros | | PISMO1_NAND | | | PISMO2_CS0 | | | PISMO2_CS1 | | | PISMO1_ONENAND | | | PISMO2_NAND_CS0 | | | PISMO2_NAND_CS1 | | | PISMO1_NOR_BASE | | | PISMO1_NAND_BASE| | | PISMO2_CS0_BASE | | +-----------------+-----------------------------------------------------------+ Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * ARM: omap: fix GPMC address-map size for NAND and NOR devicespekon gupta2014-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes commit a0a37183bd75e74608bc78c8d0e2a34454f95a91 ARM: omap: merge GPMC initialization code for all platform 1) NAND device are not directly memory-mapped to CPU address-space, they are indirectly accessed via following GPMC registers: - GPMC_NAND_COMMAND_x - GPMC_NAND_ADDRESS_x - GPMC_NAND_DATA_x Therefore from CPU's point of view, NAND address-map can be limited to just above register addresses. But GPMC chip-select address-map can be configured in granularity of 16MB only. So this patch uses GPMC_SIZE_16M for all NAND devices. 2) NOR device are directly memory-mapped to CPU address-space, so its address-map size depends on actual addressable region in NOR FLASH device. So this patch uses CONFIG_SYS_FLASH_SIZE to derive GPMC chip-select address-map size configuration. Signed-off-by: Pekon Gupta <pekon@ti.com>
| | * board: k2e-evm: add board supportHao Zhang2014-07-251-0/+37
| | | | | | | | | | | | | | | | | | | | | This patch adds Keystone2 k2e_evm evaluation board support. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * ARM: keystone2: clock: add K2E clock supportHao Zhang2014-07-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock definitions and commands to support Keystone2 K2E SOC. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * configs: k2hk_evm: config: add common EVM configuration headerHao Zhang2014-07-252-244/+289
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a common config header file for all the Keystone II EVM platforms. It combines a lot of general definitions in one file. The common header included in the EVM should be specific configuration header. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * ARM: keystone2: move K2HK board files to common KS2 board directoryHao Zhang2014-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves K2HK board directory to a common Keystone II board directory. The Board related common functions are moved to a common keystone board file. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * k2hk: use common KS2_ prefix for all hardware definitionsKhoronzhuk, Ivan2014-07-251-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use KS2_ prefix in all definitions, for that replace K2HK_ prefix and add KS2_ prefix where it's needed. It requires to change names also in places where they're used. Align lines and remove redundant definitions in kardware-k2hk.h at the same time. Using common KS2_ prefix helps resolve redundant redefinitions and adds opportunity to use KS2_ definition across a project not thinking about what SoC should be used. It's more convenient and we don't need to worry about the SoC type in common files, hardware.h will think about that. The hardware.h decides definitions of what SoC to use. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * ARM: omap: tao3530: Convert to generic boardStefan Roese2014-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use generic board setup functions by defining CONFIG_SYS_GENERIC_BOARD. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com>
| | * tricorder: convert to generic boardAndreas Bießmann2014-07-251-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Thomas Weber <thomas.weber@corscience.de>
| | * k2hk_evm: add script to automate NAND flash processKhoronzhuk, Ivan2014-07-251-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add script to automate NAND flash process. As for now the board has two burn scripts - burn to boot from SPI NOR flash and burn to boot from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi. Also update README to contain NAND burn U-boot process description. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com>
| | * mtd: nand: davinci: add opportunity to write keystone U-boot imageKhoronzhuk, Ivan2014-07-251-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Keystone SoCs use the same NAND driver as Davinci. This patch adds opportunity to write Keystone U-boot image to NAND device using appropriate RBL ECC layout. This is needed only if RBL boots U-boot from NAND device and that's supposed that raw u-boot partition is used only for writing image. The main problem is that default Davinci ECC layout is different from Keystone RBL layout. To read U-boot image the RBL needs that image was written using RBL ECC layout. The BBT table is written using default Davinci layout and has to be updated using one. The BBT can be updated only while erasing chip or by forced bad block assigning, so erase function has to use native ecc layout in order to be able to write BBT correctly. So if we're writing to NAND U-boot address we use RBL layout for others we use default ECC layout. Also remove definition for CONFIG_CMD_NAND_ECCLAYOUT as there is no reasons to use ECC layout commands. It was added by mistake. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * tps65218/am43xx_evm: Add power framework support to TPS65218Tom Rini2014-07-252-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Add in an init function for the drivers/power framework so we can dump and read the registers via i2c. Cc: Łukasz Majewski <l.majewski@samsung.com> Signed-off-by: Tom Rini <trini@ti.com>
| | * power/pmic.h: Add prototype for power_init_board.Tom Rini2014-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | As this is a weak function that we may override, provide a prototype for it. Cc: Łukasz Majewski <l.majewski@samsung.com> Signed-off-by: Tom Rini <trini@ti.com>
| | * drivers: net: cpsw: add support for using second port as ethernetMugunthan V N2014-07-251-0/+1
| | | | | | | | | | | | | | | | | | | | | Add support for using the second slave port of cpsw to be used as primary ethernet. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * | Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'Albert ARIBAUD2014-07-281-0/+166
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| | * | arm: rmobile: Add support Alt boardNobuhiro Iwamatsu2014-07-241-0/+166
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The alt board has R8A7794, 1GB DDR3-SDRAM, USB, Ethernet, QSPI, MMC, SDHI and more. This commit supports the following functions: - DDR3-SDRAM - SCIF - I2C - Ethernet - QSPI Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-288-3/+102
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| | * | sunxi: add gpio driverIan Campbell2014-07-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables CONFIG_CMD_GPIO for the Allwinner (sunxi) platform as well as providing the common gpio API (gpio_request/free, direction in/out, get/set etc). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Henrik Nordström <henrik@henriknordstrom.net> Cc: Tom Cubie <Mr.hipboi@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| | * | sunxi: use random parts of SID to set ethaddrJonathan Liu2014-07-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to the USB NIC found on OMAP5uEVM, PandaBoard and BeagleBoard-XM boards, the sunxi SoCs have a NIC onboard without an embedded MAC address. Just like the omap used on these boards, the sunxi SoCs do have a unique chip id, in the form of the 128 bit SID register: http://linux-sunxi.org/SID_Register_Guide So mimick the BeagleBoard-XM board code (commit 548a64d8) and use the chip id to generate a unique fixed MAC address. We check for the SID not being all 0, since some early A20 batches shipped without having there SID programmed. Note we use specific parts of the 128 bits, since some parts indicate the SoC family / revision, and thus are fixed. The algorithm for this was taken from the linux-sunxi.org kernels. Signed-off-by: Jonathan Liu <net147@gmail.com> [hdegoede@redhat.com: Expanded the commit message with some more info] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| | * | sunxi: Add axp152 pmic supportHans de Goede2014-07-181-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the x-powers axp152 pmic which is found on most A10s boards and enable it for the r7-tv-dongle board. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| | * | sunxi: Add axp209 pmic supportHenrik Nordstrom2014-07-185-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the x-powers axp209 pmic which is found on most A10, A13 and A20 boards. And enable AXP209 support for the Cubietruck and Cubieboard boards. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| | * | sunxi: Add i2c supportHans de Goede2014-07-181-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the i2c controller found on all Allwinner sunxi SoCs, this is the same controller as found on the Marvell orion5x and kirkwood SoC families, with a slightly different register layout, so this patch uses the existing mvtwsi code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Heiko Schocher <hs@denx.de> [ ijc -- updated u-boot-spl-fel.lds ]
| | * | mvtwsi: convert to CONFIG_SYS_I2C frameworkHans de Goede2014-07-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note this has only been tested on Allwinner sunxi devices (support for which gets introduced by a later patch). The kirkwood changes have been compile tested using the wireless_space board config, the orion5x changes have been compile tested using the edminiv2 board config. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Heiko Schocher <hs@denx.de>
| | * | sunxi: Add emac glue, enable emac on the cubieboardHans de Goede2014-07-061-0/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| | * | net: Rename and cleanup sunxi (Allwinner) emac driverStefan Roese2014-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There have been 3 versions of the sunxi_emac support patch during its development. Somehow version 2 ended up in upstream u-boot where as the u-boot-sunxi git repo got version 3. This bumps the version in upstream u-boot to version 3 of the patch: - Initialize MII clock earlier so mii access to allow independent use - Name change from WEMAC to EMAC to match mainline kernel & chip manual - Cosmetic code cleanup Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| | * | sunxi: Add sun5i supportHans de Goede2014-07-062-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Allwinner A13 and A10s SoCs also know as the Allwinner sun5i family, and the A13-OLinuXinoM A13 based and r7-tv-dongle A10s based boards. The only differences compared to the already supported sun4i and sun7i families are all in the DRAM controller initialization: -Different hcpr values -Different MBUS settings -Some other small initialization changes Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| | * | sunxi: Add sun4i supportHans de Goede2014-07-061-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Allwinner A10 SoC also known as the Allwinner sun4i family, and add the Cubieboard board which uses the A10 SoC. Compared to sun7 only the DRAM controller is a bit different: -Controller reset bits are inverted, but only for Rev. A -Different hpcr values -No MBUS on sun4i -Various other initialization changes Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| | * | sunxi: Remove mmc DMA supportHans de Goede2014-07-061-1/+0
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'Albert ARIBAUD2014-07-261-0/+2
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| | * | ARM: zynq: Enable generic board for Xilinx ZynqMichal Simek2014-07-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for all Zynq boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> [on ZC706 board]
* | | | Merge git://www.denx.de/git/u-boot-ppc4xxTom Rini2014-07-289-0/+10
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| * | | | board: Add CONFIG_SYS_GENERIC_BOARD to all gdsys boardsDirk Eibach2014-07-259-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the generic board infrastructure to all gdsys boards. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-07-2813-492/+615
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| * | | | board/freescale: use generic board architecture for t2080qds and t2080rdbShengzhou Liu2014-07-232-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested with NOR boot and NAND boot on T2080QDS and T2080RDB. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * | | | powerpc/t1040: update i2c for t1040qds and t104xrdbShengzhou Liu2014-07-222-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Fix base address of I2C2 as 0x118100 instead of 0x119000. - Add definitions for I2C3 & I2C4. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/ifc: fix invalid CSn FTIM2.TCH settingShaohui Xie2014-07-227-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some platforms, CSn FTIM2.TCH is set to zero which is invalid, an invalid hold time makes DUT timing variances, whether it works or not on luck. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | driver/nand: Add support of 16K SRAM for IFC 2.0Prabhakar Kushwaha2014-07-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Internal SRAM has been incresed from 8KB to 16KB for IFC cotroller ver 2.0. Update the page offset calculation logic to support the same. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | driver/nand: Update SRAM initialize logic for IFC.Prabhakar Kushwaha2014-07-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IFC controller v1.1.0 requires internal SRAM initialize by reading NAND flash. Higher controller versions have provided "SRAM init" bit in NCFGR register space. update SRAM initialize logic to reflect the same. Also print error message in case of Page read error. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/mpc85xx: Remove P1023 RDS supportLijun Pan2014-07-221-479/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since P1023RDS is no longer supported/manufactured by Freescale, we clean up P1023RDS related code. Since P1023RDB is still supported by Freescale, we keep P1023RDB releated code. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | qe: move immap_qe.h from arch directory into common directoryZhao Qiang2014-07-222-1/+583
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ls1021 is arm-core and supports qe too. Move immap_qe.h into common directory for both arm and powerpc. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | board/t2080qds: enable sst and eon spi flash for nor bootShengzhou Liu2014-07-221-1/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary condition CONFIG_RAMBOOT_PBL to have SST and EON SPI flash work in case of NOR boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | | dm: Add dm_scan_other() to locate board-specific devicesSimon Glass2014-07-231-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards will have devices which are not in the device tree and do not have platform data. They may be programnatically created, for example. Add a hook which boards can use to bind those devices early in boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Add child_pre_probe() and child_post_remove() methodsSimon Glass2014-07-232-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices (particularly bus devices) must track their children, knowing when a new child is added so that it can be set up for communication on the bus. Add a child_pre_probe() method to provide this feature, and a corresponding child_post_remove() method. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Introduce per-child data for devicesSimon Glass2014-07-232-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some device types can have child devices and want to store information about them. For example a USB flash stick attached to a USB host controller would likely use this space. The controller can hold information about the USB state of each of its children. The data is stored attached to the child device in the 'parent_priv' member. It can be auto-allocated by dm when the child is probed. To do this, add a per_child_auto_alloc_size value to the parent driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Add functions to access a device's childrenSimon Glass2014-07-231-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices can have childen that can be addressed by a simple index, the sequence number or a device tree offset. Add functions to access a child in each of these ways. The index is typically used as a fallback when the sequence number is not available. For example we may use a serial UART with sequence number 0 as the console, but if no UART has sequence number 0, then we can fall back to just using the first UART (index 0). The device tree offset function is useful for buses, where they want to locate one of their children. The device tree can be scanned to find the offset of each child, and that offset can then find the device. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Provide a function to scan child FDT nodesSimon Glass2014-07-233-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present only root nodes in the device tree are scanned for devices. But some devices can have children. For example a SPI bus may have several children for each of its chip selects. Add a function which scans subnodes and binds devices for each one. This can be used for the root node scan also, so change it. A device can call this function in its bind() or probe() methods to bind its children. Signed-off-by: Simon Glass <sjg@chromium.org>
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