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| * ppc4xx: Correctly setup ranges property in ebc nodeStefan Roese2008-10-211-0/+31
| | | | | | | | | | | | | | | | Previously only the NOR flash mapping was written into the ranges property of the ebc node. This patch now writes all enabled chip select areas into the ranges property. Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Add GDSys neo 405EP board supportDirk Eibach2008-10-211-0/+231
| | | | | | | | | | Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Update configs for Netstal boardsNiklaus Giger2008-10-214-275/+292
| | | | | | | | | | | | | | | | | | | | I reorganized my config files, putting the common stuff into netstal-common.h (got the idea by looking a amcc-common.h from Stefan). Added stuff to boot the new powerpc linux via NFS (only tested with HCU4). Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Add routine to retrieve CPU numberAdam Graham2008-10-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Provide a weak defined routine to retrieve the CPU number for reference boards that have multiple CPU's. Default behavior is the existing single CPU print output. Reference boards with multiple CPU's need to provide a board specific routine. See board/amcc/arches/arches.c for an example. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Add AMCC Arches board support (dual 460GT)Adam Graham2008-10-213-18/+224
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Arches Evaluation board is based on the AMCC 460GT SoC chip. This board is a dual processor board with each processor providing independent resources for Rapid IO, Gigabit Ethernet, and serial communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR FLASH, UART, EEPROM and temperature sensor, along with a shared debug port. The two 460GT's will communicate with each other via shared memory, Gigabit Ethernet and x1 PCI-Express. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Victor Gallardo <vgallardo@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | TQM8260: environment in flash instead EEPROM, baudrate 115kWolfgang Denk2008-10-211-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Several customers have reported problems with the environment in EEPROM, including corrupted content after board reset. Probably the code to prevent I2C Enge Conditions is not working sufficiently. We move the environment to flash now, which allows to have a backup copy plus gives much faster boot times. Also, change the default console initialization to 115200 bps as used on most other boards. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | strmhz(): Round numbers when printing clock frequenciesWolfgang Denk2008-10-211-2/+3
| | | | | | | | | | | | | | | | | | Round clock frequencies for printing. Many boards printed off clock frequencies like 399 MHz instead of the exact 400 MHz because numberes were not rounded. This is fixed now. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | 85xx: properly document MPC85xx_PORDEVSR2_SEC_CFGTimur Tabi2008-10-211-0/+1
| | | | | | | | | | | | | | | | | | Commit f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot to add a comment that the correct value disagrees with the 8544 reference manual. The changelog for that commit is also wrong, as it says "bit 28" when it should be "bit 24". Signed-off-by: Timur Tabi <timur@freescale.com>
* | Merge git://git.denx.de/u-boot into x1Markus Klotzbuecher2008-10-21542-36925/+37419
|\ \ | |/ | | | | | | | | Conflicts: drivers/usb/usb_ohci.c
| * Merge 'next' branchWolfgang Denk2008-10-18535-36787/+37274
| |\ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: board/freescale/mpc8536ds/mpc8536ds.c include/configs/mgcoge.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| | * mgcoge: add redundant environment sectorHeiko Schocher2008-10-181-0/+5
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgsuvd: update size of environmentHeiko Schocher2008-10-181-3/+1
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * Enabled the Freescale SGMII riser card on 8536DSJason Jin2008-10-181-0/+3
| | | | | | | | | | | | Signed-off-by: Jason Jin <Jason.jin@freescale.com>
| | * Enabled the Freescale SGMII riser card on 8572DSLiu Yu2008-10-181-0/+24
| | | | | | | | | | | | | | | | | | | | | This patch based on Andy's work. Including command 'pixis_set_sgmii' support. Signed-off-by: Liu Yu <yu.liu@freescale.com>
| | * Make pixis_set_sgmii more general to support MPC85xx boards.Liu Yu2008-10-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pixis sgmii command depend on the FPGA support on the board, some 85xx boards support SGMII riser card but did not support this command, define CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command. Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and PIXIS_VCFGEN1_MASK in header file for both boards. Signed-off-by: Liu Yu <yu.liu@freescale.com>
| | * Add ddr interleaving suppport for MPC8572DS boardHaiying Wang2008-10-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add board specific parameter table to choose correct cpo, clk_adjust, write_data_delay, 2T based on board ddr frequency and n_ranks. * Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#. * Set memory controller interleaving mode to bank interleaving, and disable bank(chip select) interleaving mode by default, because the default on-board DDR DIMMs are 2x512MB single-rank. * Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| | * Pass dimm parameters to populate populate controller optionsHaiying Wang2008-10-181-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| | * Make DDR interleaving mode work correctlyHaiying Wang2008-10-181-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some bugs: 1. Correctly set intlv_ctl in cs_config. 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled. 3. Set base_address and total memory for each ddr controller in memory controller interleaving mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| | * 85xx: Enable interrupt and setexpr commands on Freescale 85xx boardsKumar Gala2008-10-189-0/+18
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * 85xx: Export invalidate_{i,d}cache and add flush_dcacheKumar Gala2008-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Added the ability for C code to invalidate the i/d-cache's and to flush the d-cache. This allows us to more efficient change mappings from cache-able to cache-inhibited. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * mgsuvd: fix compiler warning when using soft_i2c driverHeiko Schocher2008-10-181-9/+9
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgsuvd: fix coding styleHeiko Schocher2008-10-181-6/+4
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgcoge: added CONFIG_FIT to support the new u-boot image formatHeiko Schocher2008-10-181-0/+1
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18529-36823/+36823
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
| | * Expose command table search for sub-commandsKumar Gala2008-10-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sub-command can benefit from using the same table and search functions that top level commands have. Expose this functionality by refactoring find_cmd() and introducing find_cmd_tbl() that sub-command processing can call. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * mgsuvd, mgcoge: added BOOTCOUNT feature.Heiko Schocher2008-10-182-0/+4
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgcoge, mgsuvd: added support for the IVM EEprom.Heiko Schocher2008-10-182-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | The EEprom contains some Manufacturerinformation, which are read from u-boot at boot time, and saved in same hush shell variables. Signed-off-by: Heiko Schocher <hs@denx.de>
| | * hush: add showvar command for hush shell.Heiko Schocher2008-10-181-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This new command shows the local variables defined in the hush shell: => help showvar showvar - print values of all hushshell variables showvar name ... - print value of hushshell variable 'name' Also make the set_local_var() and unset_local_var () no longer static, so it is possible to define local hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR is defined, u-boot calls hush_init_var (), where boardspecific code can define local hush shell variables at boottime. Signed-off-by: Heiko Schocher <hs@denx.de>
| | * I2C: adding new "i2c bus" Command to the I2C Subsystem.Heiko Schocher2008-10-183-0/+25
| | | | | | | | | | | | | | | | | | | | | With this Command it is possible to add new I2C Busses, which are behind 1 .. n I2C Muxes. Details see README. Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgcoge, mgsuvd: add board specific I2C deblocking mechanism.Heiko Schocher2008-10-182-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As documented in doc/I2C_Edge_Conditions, adding a board specific deblocking mechanism via CFG_I2C_INIT_BOARD for the mgcoge and mgsuvd board. This code was originally written by Keymile in association with Anatech and Atmel in 1998. The Code toggels the SCL until the SCA line goes to HIGH (max. 16 times). And after this, a start condition is sent. This is another approach to deblock the I2C Bus. The soft I2C driver actually sends 9 clocks with SDA High, and then a stop at the end, to deblock the I2C Bus. Maybe we should use the approach from Keymile as the new standard? Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgcoge, mgsuvd: add DTT (LM75) support.Heiko Schocher2008-10-182-0/+18
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgcoge, mgsuvd: added EEprom support.Heiko Schocher2008-10-182-0/+15
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * mgcoge, mgsuvd: add I2C support.Heiko Schocher2008-10-182-0/+68
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| | * soft_i2c: prevent compiler warnings if driver does not use CPU Pins.Heiko Schocher2008-10-181-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following warnings, when using the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx systems: soft_i2c.c: In function 'send_reset': soft_i2c.c:93: warning: unused variable 'immr' soft_i2c.c: In function 'send_start': soft_i2c.c:124: warning: unused variable 'immr' soft_i2c.c: In function 'send_stop': soft_i2c.c:146: warning: unused variable 'immr' soft_i2c.c: In function 'send_ack': soft_i2c.c:171: warning: unused variable 'immr' soft_i2c.c: In function 'write_byte': soft_i2c.c:196: warning: unused variable 'immr' soft_i2c.c: In function 'read_byte': soft_i2c.c:244: warning: unused variable 'immr' Signed-off-by: Heiko Schocher <hs@denx.de>
| | * hwmon: Add LM63 supportDirk Eibach2008-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the National LM63 temperature sensor with integrated fan control. It's used on the GDSys Neo board (405EP) which will be submitted later. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Acked-by: Stefan Roese <sr@denx.de>
| | * Add Red Black Tree supportKyungmin Park2008-10-181-0/+160
| | | | | | | | | | | | | | | | | | | | | Now it's used at UBI module. Of course other modules can use it. If you want to use it, please define CONFIG_RBTREE Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| | * Add support for CONFIG_EFI_PARTITION (GUID Partition Table)richardretanubun2008-10-181-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | The GUID (Globally Unique Identifier) Partition Table (GPT) is a part of EFI. See http://en.wikipedia.org/wiki/GUID_Partition_Table Based on linux/fs/partitions/efi.[ch] Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
| | * flash: factor out adjusting of Flash address to the end of sectorBartlomiej Sieka2008-10-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The upcoming automatic update feature needs the ability to adjust an address within Flash to the end of its respective sector. Factor out this functionality to a new function flash_sect_roundb(). Signed-off-by: Rafal Czubak <rcz@semihalf.com> Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * Adds two more ethernet interface to 83xxrichardretanubun2008-10-181-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added as a convenience for other platforms that uses MPC8360 (has 8 UCC). Six eth interface is chosen because the platform I am using combines UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth. Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| | * Change UEC PHY interface to RGMII on MPC8568MDSHaiying Wang2008-10-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change UEC phy interface from GMII to RGMII on MPC8568MDS board Because on MPC8568MDS, GMII interface is only recommended for 1000Mbps speed, but RGMII interface can work at 10/100/1000Mbps, and RGMII interface works more stable. Now both UEC1 and UEC2 can work properly under u-boot. It is also in consistent with the kernel setting for 8568 UEC phy interface. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
| * | mgcoge: add redundant environment sectorHeiko Schocher2008-10-171-0/+5
| | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | mgsuvd: update size of environmentHeiko Schocher2008-10-171-3/+1
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * | ppc4xx: PPC44x MQ initializationYuri Tikhonov2008-10-171-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC values. This fixes the occasional 440SPe hard locking issues when the 440SPe's dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver). Previously the appropriate initialization had been made in Linux, by the ppc440spe ADMA driver, which is wrong because modifying the MQ configuration registers after normal operation has begun is not supported and could have unpredictable results. Comment from Stefan: This patch doesn't change the resulting value of the MQ registers. It explicitly sets/clears all bits to the desired state which better documents the resulting register value instead of relying on pre-set default values. Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | 85xx: Using proper I2C source clock divider for MPC8544Kumar Gala2008-10-171-1/+1
| |/ | | | | | | | | | | | | | | | | | | The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being bit 26, instead it should be bit 28. This caused in incorrect interpretation of the i2c_clk which is the same as the SEC clk on MPC8544. The SEC clk is controlled by cfg_sec_freq that is reported in PORDEVSR2. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Remove unwanted ';' at end of define.Selvamuthukumar2008-10-147-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently this is not creating any problem. But it will result in compilation error when used as below. printf("CFG_SDRAM_CFG2 - %08x\n", CFG_SDRAM_CFG2); Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> continuation of the theme based on git grep "^#define CFG_.*;$" include/ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * Remove unused CFG_EEPROM_PAGE_WRITE_ENABLE referencesPeter Tyser2008-10-1464-66/+0
| | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * sh: rsk7203: Add smc911x driver support to board config fileNobuhiro Iwamatsu2008-10-141-0/+5
| | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-10-1318-16/+71
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| | * Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/masterWolfgang Denk2008-10-123-7/+3
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| | | * Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2008-10-123-7/+3
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