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* mtd/nand/ubi: assortment of alignment fixesMarcel Ziswiler2015-08-281-0/+9
| | | | | | | | | | | | | | Various U-Boot adoptions/extensions to MTD/NAND/UBI did not take buffer alignment into account which led to failures of the following form: ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <scottwood@freescale.com> [trini: Add __UBOOT__ hunk to lib/zlib/zutil.c due to malloc.h in common.h] Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: spear: Some changes / updates to the x600 config headerStefan Roese2015-08-281-5/+16
| | | | | | | | | | | | | | | This patch brings the following changes to the x600 board support: - Add USB EHCI support - Add VFAT support for USB key file access - Increase malloc size (for UBI / UBIFS usage) - Enable Thumb mode to save some image space - Remove unreferenced CONFIG_STACKSIZE - Remove unreferenced CONFIG_SPL_NO_PRINTF Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
* arm: spear: Move to common SPL infrastructureStefan Roese2015-08-281-5/+12
| | | | | | | | | | | | | The SPL implementation for SPEAr600 is older than the common SPL infrastructure. This patch now moves the SPEAr600 SPL over to the common SPL code. Tested on the only SPEAr board that currently uses SPL in mainline U-Boot, the x600. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com>
* ARM: keystone2: configs: Move SP to end of u-boot sectionLokesh Vutla2015-08-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently u-boot stack is defined at the beginning of MSMC RAM. This is a problem for uart boot mode as ROM downloads directly to starting of MSMC RAM. Fixing it by moving stack to the end of u-boot section and shifting SYS_TEXT_BASE to the start of MSMC RAM. Updated division of MSMC RAM is shown below: ----------------------------------------- | | | | | U-Boot text |U-Boot | SPL text | | download | Stack | Download + | | | | SPL_BSS + | | | | SPL_STACK | ----------------------------------------- [1] [2] [3] [4] [1] SYS_TEXT_BASE (Start of MSMC RAM) [2] SPL_TEXT_BASE - GBL_DATA_SIZE [3] SPL_TEXT_BASE [4] END of SPL [1] + [2] is at least 1M on all platforms, so no chance of overlap. Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* NDS32: Generic Board Support and UnsupportKun-Hua Huang2015-08-282-718/+0
| | | | | | Remove ag101 and ag102 support Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
* NDS32: Generic Board Support and UnsupportKun-Hua Huang2015-08-281-14/+36
| | | | | | Add nds32 ag101p generic board support. Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
* rpi: set fdt_addr_r to 0x00000100 to match default device_tree_addressJonathan Liu2015-08-281-2/+2
| | | | | | | Raspberry Pi by default loads the FDT to 0x00000100 so set fdt_addr_r to match and move scriptaddr to 0x02000000 to avoid clobbering the FDT. Signed-off-by: Jonathan Liu <net147@gmail.com>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-08-269-55/+90
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| * x86: crownbay: Enable on-board SMSC superio keyboard controllerBin Meng2015-08-261-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far we only enabled one legacy serial port on the SMSC LPC47m superio chipset on Intel Crown Bay board. As the board also has dual PS/2 ports routed out, enable the keyboard controller which is i8042 compatible so that we can use PS/2 keyboard and mouse. In order to make PS/2 keyboard work with the VGA console, remove CONFIG_VGA_AS_SINGLE_DEVICE. To boot Linux kernel with PIC mode using PIRQ routing table, adjust the mask in the device tree to reserve irq12 which is used by PS/2 mouse. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: i8042: Clean up the driver per coding conventionBin Meng2015-08-261-44/+59
| | | | | | | | | | | | | | | | | | - Rename CamelCase variables to conform U-Boot coding convention - Rename wait_until_kbd_output_full() to kbd_output_full() - Change to use macros for i8042 command and control register bits Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: pci: Add a comment to help find pci_hose_read_config_byte, etc.Simon Glass2015-08-261-0/+1
| | | | | | | | | | | | | | | | These functions are defined by macros so do not show up with grep. Add a comment to help. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: superio: Add keyboard controller support to smsc_lpc47m driverBin Meng2015-08-261-4/+25
| | | | | | | | | | | | | | | | | | Add an api to enable and configure the integrated keyboard controller on SMSC LPC47m superio chipset. It also adds several macros to help future extension. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * video: coreboot: Save VESA mode for future useBin Meng2015-08-261-0/+2
| | | | | | | | | | | | | | | | When booting as a coreboot payload, the framebuffer details are passed from coreboot via configuration tables. We save these information into vesa_mode_info structure for future use. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Enable CONFIG_PCI_CONFIG_HOST_BRIDGE for all boardsBin Meng2015-08-265-4/+1
| | | | | | | | | | | | | | It looks that x86 chipset always contains a host bridge at pci b.d.f 0.0.0, so enable this for all boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Only include cbfs command for corebootBin Meng2015-08-261-0/+2
| | | | | | | | | | | | When running U-Boot bare-metal, the cbfs command is useless. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge git://git.denx.de/u-boot-nand-flashTom Rini2015-08-264-42/+95
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| * arm: mvebu: Enable NAND on db-mv784mp-gpStefan Roese2015-08-251-0/+5
| | | | | | | | | | | | | | | | | | This patch enables NAND support on the Marvell Armada XP DB-MV784MP-GP eval board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Peter Morrow <peter@senient.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * mtd: nand: Increase max sizes of OOB and Page sizeSiva Durga Prasad Paladugu2015-08-252-3/+3
| | | | | | | | | | | | | | Increase max sizes for OOB, Page size and eccpos to suit for Micron MT29F32G08 part Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * nand: Sync with Linux v4.1Scott Wood2015-08-252-5/+84
| | | | | | | | | | | | | | | | | | | | | | Update the NAND code to match Linux v4.1. The previous sync was from Linux v3.15 in commit 4e67c57125290b25. CONFIG_SYS_NAND_RESET_CNT is removed, as the upstream Linux code now has its own timeout. Plus, CONFIG_SYS_NAND_RESET_CNT was undocumented and not selected by any board. Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd: Introduce mtd_block_isreserved()Ezequiel Garcia2015-08-252-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In addition to mtd_block_isbad(), which checks if a block is bad or reserved, it's needed to check if a block is reserved only (but not bad). This commit adds an MTD interface for it, in a similar fashion to mtd_block_isbad(). While here, fix mtd_block_isbad() so the out-of-bounds checking is done before the callback check. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> [scottwood: Cherry-picked from Linux 8471bb73ba10ed67] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand: Remove __UBOOT__ ifdefsScott Wood2015-08-251-34/+0
| | | | | | | | | | | | | | I didn't approve the patch that added them. Get them out of the way before doing a sync. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | arm: pxa: colibri_pxa270: add optional i2c supportMarcel Ziswiler2015-08-241-0/+9
| | | | | | | | | | | | This is useful once Andrew's PXA I2C driver gets merged. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* | arm: pxa: colibri_pxa270: add optional lcd supportMarcel Ziswiler2015-08-241-0/+13
| | | | | | | | | | | | | | | | Add optional LCD support. Note that depending on the toolchain used one might have to drop some other features to stay within the 0x40000 size limit. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* | arm: pxa: colibri_pxa270: add some more nor flash detailsMarcel Ziswiler2015-08-241-0/+4
| | | | | | | | | | | | | | Add some more NOR flash details like size, bus width and lock/unlock time outs. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* | arm: pxa: palmtreo680: get rid of obsolete CONFIG_SYS_LCD_PXA_NO_L_BIASMarcel Ziswiler2015-08-241-1/+0
|/ | | | | | | Looks like the define CONFIG_SYS_LCD_PXA_NO_L_BIAS is not used anywhere else throughout the U-Boot sources any more. Drop it. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-08-232-2/+2
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: configs/socfpga_arria5_defconfig configs/socfpga_cyclone5_defconfig configs/socfpga_socrates_defconfig Merged these by hand and re-ran savedefconfig on them. Signed-off-by: Tom Rini <trini@konsulko.com>
| * arm: socfpga: Enable DWAPB GPIO driverMarek Vasut2015-08-232-2/+2
| | | | | | | | | | | | | | | | Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-08-2336-36/+0
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| * | net: Move CONFIG_E1000 options to KconfigSimon Glass2015-08-2136-36/+0
| |/ | | | | | | | | | | | | | | Move config for the E1000 Ethernet driver to Kconfig and tidy up affected boards. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | ARM: at91: sama5: update the spi flash mappingWu, Josh2015-08-214-33/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also move the spi flash configurations to the at91-sama5_common.h. Current at91 zImage size is about 3.3M, the old mapping is not suitable. So update the spi flash map as following: 0x0 ~ 0x004000: at91bootstrap(16k) 0x04000 ~ 0x008000: u-boot env(16k) 0x08000 ~ 0x060000: u-boot(352k) 0x60000 ~ 0x06c000: dtb (48k) 0x6c000 ~ 0x400000: kernel (3M+592k) In AT91Bootstrap, the U-Boot in spi flash also update to 0x8000, refer to following commit in AT91Bootstrap: 3e91e54 Kconfig: fix spi flash address So also update SPL's u-boot load address to 0x8000 in spi flash. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | ARM: at91: sama5: move the nandflash env config to at91-sama5_common.hWu, Josh2015-08-215-32/+16
| | | | | | | | | | | | | | As all sama5 nandflash env configurations are same, so move them to at91-sama5_common.h. Signed-off-by: Josh Wu <josh.wu@atmel.com>
* | ARM: at91: sama5d3xek: use a $dtb_name to load dtbWu, Josh2015-08-212-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since sama5d3xek boards has different type of dtb blobs, so we need to detect the cpu type in runtime. So we add a new variable $dtb_name. if $dtb_name is not defined, we just use at91-${board_name}.dtb as the $dtb_name. Otherwise, we will just load the dtb with $dtb_name. For sama5d3xek, we will detect cpu type and make up $dtb_name in runtime. Signed-off-by: Josh Wu <josh.wu@atmel.com>
* | ARM: at91: sama5: move the sd/mmc env config to at91-sama5_common.hWu, Josh2015-08-215-50/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | As almost all sama5 sd/mmc env configurations are same, so move them to at91-sama5_common.h. Also define CONFIG_ENV_VARS_UBOOT_CONFIG to have the varaible: $board_name. Then we can use 'at91-${board_name}.dtb' as the dtb name. TODO: since sama5d3xek has different dtb name, we need to some extra stuff to make it work on sama5d3xek boards. Signed-off-by: Josh Wu <josh.wu@atmel.com>
* | arm: at91: add support for mini-box picosam9g45 boardErik van Luijk2015-08-211-0/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bootlog: U-Boot SPL 2015.10-rc1-00452-g96a7ed1 (Aug 17 2015 - 10:32:21) mci: setting clock 258000 Hz, block size 512 mci: setting clock 258000 Hz, block size 512 mci: setting clock 258000 Hz, block size 512 mci: setting clock 33024000 Hz, block size 512 reading u-boot.img reading u-boot.img U-Boot 2015.10-rc1-00452-g96a7ed1 (Aug 17 2015 - 10:32:21 +0000) CPU: AT91SAM9G45 Crystal frequency: 12 MHz CPU clock : 400 MHz Master clock : 133.333 MHz Watchdog enabled DRAM: 256 MiB WARNING: Caches not enabled MMC: mci: 0 mci: setting clock 260416 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 mci: setting clock 33333333 Hz, block size 512 reading uboot.env In: serial Out: serial Err: serial Net: macb0 Error: macb0 address not set. Hit any key to stop autoboot: 0 U-Boot> Signed-off-by: Erik van Luijk <evanluijk@interact.nl> [add 'picosam9g45_defconfig' to MAINTAINERS] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm: at91: mpddr: allow multiple DDR controllersErik van Luijk2015-08-214-7/+0
|/ | | | | | | | | The mpddr.c depends on ATMEL_BASE_MPDDRC for the base address to configure the controller. This cannot be used when there is more than one controller (i.e. AT91SAM9G45, AT91SAM9M10). Signed-off-by: Erik van Luijk <evanluijk@interact.nl> [remove 'new blank line at EOF'] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ARM: davinci: remove support for cam_enc_4xxMasahiro Yamada2015-08-201-504/+0
| | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* zynq: Make CONFIG_OF_EMBED default caseMichal Simek2015-08-191-1/+1
| | | | | | | Use embedded DTB to let users use u-boot instead of u-boot-dtb.bin. And fix SPL to use this target. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynqmp: usb: Add usb dwc3 driver support for zynqmpSiva Durga Prasad Paladugu2015-08-191-2/+40
| | | | | | | | | | Added usb dwc3 driver support for zynqmp this also supports the DFU and LTHOR to download the linux images on to RAM and cen be booted from those linux images. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynqmp_ep: Enable ethernet for EPMichal Simek2015-08-191-0/+3
| | | | | | Enable gem0 and setup phy addr for EP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-186-18/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROLMasahiro Yamada2015-08-182-2/+2
| | | | | | | | | | | | | | | | | | | As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* fdtdec: fix OF_CONTROL switchMasahiro Yamada2015-08-181-1/+1
| | | | | | | | There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: drop CONFIG_DM_DEVICE_REMOVE from uncmd listMasahiro Yamada2015-08-183-8/+7
| | | | | | | | | | | | | | | We do not want to compile the DM remove code for SPL. Currently, we undef it in include/config_uncmd_spl.h (for C files) and in scripts/Makefile.uncmd_spl (for Makefiles). This is really ugly. This commit demonstrates how we can deprecate those two files. Use $(SPL_) for the entry in the Makfile and CONFIG_IS_ENABLED() in C files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* linux/kconfig.h: add CPP macros useful for per-image config optionsMasahiro Yamada2015-08-181-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous commit introduced a useful macro used in makefiles, in order to reference to different variables (CONFIG_... or CONFIG_SPL_...) depending on the build context. Per-image config option control is a PITA in C sources, too. Here are some macros useful in C/CPP expressions. CONFIG_IS_ENABLED(FOO) can be used as a shorthand for (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_FOO)) || \ (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FOO)) For example, it is useful to describe C code as follows, #if CONFIG_IS_ENABLED(OF_CONTROL) (device tree code) #else (board file code) #endif The ifdef conditional above is switched by CONFIG_OF_CONTROL during the U-Boot proper building (CONFIG_SPL_BUILD is not defined), and by CONFIG_SPL_OF_CONTROL during SPL building (CONFIG_SPL_BUILD is defined). The macro can be used in C context as well, so you can also write the equivalent code as follows: if (CONFIG_IS_ENABLED(OF_CONTROL)) { (device tree code) } else { (board file code) } Another useful macro is CONFIG_VALUE(). CONFIG_VALUE(FOO) is expanded into CONFIG_FOO if CONFIG_SPL_BUILD is undefined, and into CONFIG_SPL_FOO if CONFIG_SPL_BUILD is defined. You can write as follows: text_base = CONFIG_VALUE(TEXT_BASE); instead of: #ifdef CONFIG_SPL_BUILD text_base = CONFIG_SPL_TEXT_BASE; #else text_base = CONFIG_TEXT_BASE; #endif This commit also adds slight hacking on fixdep so that it can output a correct list of fixed dependencies. If the fixdep finds CONFIG_IS_ENABLED(FOO) in a source file, we want $(wildcard include/config/foo.h) in the U-boot proper building context, while we want $(wildcard include/config/spl/foo.h) in the SPL build context. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* lpc32xx: move common SLC NAND defines to arch/config.hVladimir Zapolskiy2015-08-181-11/+3
| | | | | | | | | | | | | | | A number of LPC32xx SLC NAND defines is dictated by controller hardware limits and OOB layout is defined by operating system, the definitions are common for all users. Since those macro are used in out of NAND SLC driver code (simple NAND SPL framework), they can not be placed into the driver, therefore move them from board config files to arch/config.h The change also adds OOB layout details specific to small page NAND devices taken from Linux kernel. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-08-182-0/+5
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| * ARM: dra7xx_evm: Enable EDMA3 in SPL to support DMA on qspiVignesh R2015-08-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | Enable TI_EDMA3 and SPL_DMA support, so as to reduce boot time. With DMA enabled there is almost 3x improvement in read performance. This helps in reducing boot time in qspiboot mode Also add EDMA3 base address for DRA7XX and AM57XX. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * sf: ops: Add spi_flash_copy_mmap functionTom Rini2015-08-171-0/+3
| | | | | | | | | | | | | | | | | | | | When doing a memory mapped copy we may have DMA available and thus need to have this copy abstracted so that the driver can do it, rather than a simple memcpy. Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2015-08-173-3/+43
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| * | arm: mvebu: db-88f6820-gp: Enable PCI supportStefan Roese2015-08-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enabled the MVEBU PCIe support on the db-88f6820-gp A38x eval board. It also enabled the Intel E1000 driver support and adds the initialization of PCIe network controllers to the board code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anton Schubert <anton.schubert@gmx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
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