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* zynq: Enable CONFIG_DEFAULT_DEVICE_TREEJagannadha Sutradharudu Teki2014-01-104-0/+6
| | | | | | | | | | | | | Enabled default dts files on respective pre-board config files this is way MAKEALL will works. and it's upto user to build specific dts by specifying at build time. $ make zynq_zc70x_config $ make --> with default dts zynq-zc702.dts or $ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dts Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq-common: Enable verified boot(RSA)Jagannadha Sutradharudu Teki2014-01-101-0/+4
| | | | | | | CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* dts: zynq: Add basic fdt supportJagannadha Sutradharudu Teki2014-01-101-0/+5
| | | | | | | | | | | | | | | | | | This patch provides a basic fdt support for zynq u-boot. zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches. u-boot build: once configuring of a board done for building dtb with zynq-zed.dts as an input zynq-uboot> make DEVICE_TREE=zynq-zed Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq-common: Define CONFIG_ENV_OVERWRITEJagannadha Sutradharudu Teki2014-01-101-0/+3
| | | | | | | Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq-common: Define flash env. partitionJagannadha Sutradharudu Teki2014-01-101-1/+11
| | | | | | | Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq-common: Change Env. Sector size to 128KbJagannadha Sutradharudu Teki2014-01-101-1/+3
| | | | | | Changed Env. Sector size from 0x10000 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq-common: Define default environmentJagannadha Sutradharudu Teki2014-01-101-1/+22
| | | | | | | | | | | | | | Defined default env. for autoboot FIT image from respective boot devices. Default settings: fit_image=fit.itb load_addr=0x2000000 fit_size=0x800000 flash_off=0x100000 nor_flash_off=0xE2100000 Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add support to find bootmodeJagannadha Sutradharudu Teki2014-01-101-0/+1
| | | | | | | | | | | Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add zynq_zc770 xm012 board supportJagannadha Sutradharudu Teki2014-01-102-0/+20
| | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Stefan Roese <sr@denx.de>
* zynq: Add zynq_zc770 xm013 board supportJagannadha Sutradharudu Teki2014-01-101-0/+5
| | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add zynq_zc770 xm010 board supportJagannadha Sutradharudu Teki2014-01-101-0/+30
| | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1Gb DDR3 - 1Mb SST SPI flash - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add zynq microzed board supportJagannadha Sutradharudu Teki2014-01-101-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroZed is a low-cost development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z010-1CLG400C Memory: - 1 GB of DDR3 SDRAM - 128Mb of QSPI flash(S25FL128SAGBHI200) - Micro SD card interface Communication: - 10/100/1000 Ethernet - USB 2.0 - USB-UART User I/O: - 100 User I/O (50 per connector) - Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc: - Xilinx PC4 JTAG configuration port - PS JTAG pins accessible via Pmod - 33.33 MHz oscillator - User LED and push switch For more info - http://zedboard.org/product/microzed Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: zc70x: Add Catalyst 24WC08 EEPROM config supportJagannadha Sutradharudu Teki2014-01-102-0/+11
| | | | | | | | | Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq-common: Define exact TEXT_BASEJagannadha Sutradharudu Teki2014-01-101-1/+1
| | | | | | | Defined TEXT_BASE for u-boot starts from 0x4000000 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configsJagannadha Sutradharudu Teki2014-01-103-1/+4
| | | | | | | CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add zynq zed board supportJagannadha Sutradharudu Teki2014-01-101-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add zynq zc70x board supportJagannadha Sutradharudu Teki2014-01-102-9/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq-common: Rename zynq with zynq-commonJagannadha Sutradharudu Teki2014-01-101-3/+6
| | | | | | | | | zynq.h -> zynq-common.h, zynq-common is Common configuration options for all Zynq boards. zynq.h is no longer exists hense removed from boards.cfg Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add GEM0, GEM1 configs supportJagannadha Sutradharudu Teki2014-01-101-8/+8
| | | | | | | | | Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Add UART0, UART1 configs supportJagannadha Sutradharudu Teki2014-01-101-4/+16
| | | | | | | | | Zynq uart controller support two serial ports like CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Enable cache optionsJagannadha Sutradharudu Teki2014-01-101-0/+10
| | | | | | | | - Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Minor config cleanupJagannadha Sutradharudu Teki2014-01-101-37/+39
| | | | | | | | | Cleanups mostly on: - Add comments - Re-order configs - Remove #define CONFIG_ZYNQ_SDHCI Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Cleanup on memory configsJagannadha Sutradharudu Teki2014-01-101-13/+14
| | | | | | | | Cleanup on memory configuration options: - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Cleanup on miscellaneous configsJagannadha Sutradharudu Teki2014-01-101-9/+10
| | | | | | | | | Cleanup on miscellaneous configurable options: - Rename SYS_PROMPT as "zynq-uboot" - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Enable Boot FreeBSD/vxWorksJagannadha Sutradharudu Teki2014-01-101-0/+7
| | | | | | This enabled Boot FreeBSD/vxWorks from an ELF image support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* zynq: Enable CONFIG_FIT_VERBOSEJagannadha Sutradharudu Teki2014-01-101-0/+1
| | | | | | Enabled fit_format_{error,warning}() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* arm64: board support of vexpress_aemv8aDavid Feng2014-01-091-0/+189
| | | | | Signed-off-by: David Feng <fenghua@phytium.com.cn> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
* arm64: core supportDavid Feng2014-01-091-0/+1
| | | | | | | Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
* add weak entry definitionDavid Feng2014-01-091-0/+4
| | | | Signed-off-by: David Feng <fenghua@phytium.com.cn>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-085-237/+7
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| * arm: omap: cm_t35: enable gpio bank 5 clocks explicitlyNikita Kiryanov2014-01-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Following commit "arm: omap3: Enable clocks for peripherals only if they are used" (f33b9bd3984fb11e1d8566a866adc5957b1e1c9d) it is now necessary to enable clocks for GPIO banks explicitly. On cm_t35, GPIO bank 5 is necessary for scf0403 lcd support. Enable GPIO bank 5 clocks. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * ARM: twister: add missing gpio clock initJeroen Hofstee2014-01-071-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d breaks boards which do not explicitly enable the gpio clocks. This causes the twister spl to hang, since it uses the no longer enabled gpio 55. Add CONFIG_OMAP3_GPIO_2 to unbrick the board. Cc: Stefano Babic <sbabic@denx.de> Cc: Tapani Utriainen <tapani@technexion.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Stefano Babic <sbabic@denx.de>
| * ARM: tam3517-common: fix nand spl bootJeroen Hofstee2014-01-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit f9095aac793aa8917ab9b915c5d449e6dc8d3d30, "mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme" removed CONFIG_SPL_NAND_SOFTECC from the tam3517 common config, causing the spl nand boot to fail. Add it back, so derived boards boot again. Cc: Pekon Gupta <pekon@ti.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Raphael Assenat <raph@8d.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tapani Utriainen <tapani@technexion.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Stefano Babic <sbabic@denx.de>
| * TI:omap3: Drop omap3_zoom2Tom Rini2014-01-071-237/+0
| | | | | | | | | | | | | | The omap3_zoom2 board has not been updated for a correct CONFIG_SYS_HZ and Tom Rix's email has long been bouncing. Signed-off-by: Tom Rini <trini@ti.com>
| * cam_enc_4xx: Set CONFIG_SYS_NAND_MAX_OOBFREE / CONFIG_SYS_NAND_MAX_ECCPOSTom Rini2014-01-071-0/+2
| | | | | | | | | | | | | | | | | | | | With the changes to make OOBFREE/ECCPOS configurable but default to larger, we need to set these config options for the space savings they provide. Cc: Scott Wood <scottwood@freescale.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
* | arm/km: fix i2c mux define for km_kirkwood_128m16 targetHolger Brunck2014-01-061-1/+1
| | | | | | | | | | | | | | | | Due to the i2c mux rework in u-boot we now have only to specify the busnumber and not the whole mux configuration. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Acked-by: Heiko Schocher <hs@denx.de>
* | arm/km: add support for km_kirkwood_128m16 boardKarlheinz Jerg2014-01-061-0/+10
| | | | | | | | | | | | | | | | | | | | The board is similar to the standard km_kirkwood board. From a u-boot point of view, the only difference is an increased 256 MiB DRAM (128M16). A board based on this design is for example the SUP12. Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* | kirkwood: ib62x0: use device tree and update configLuka Perkov2014-01-061-15/+23
|/ | | | | | Signed-off-by: Luka Perkov <luka@openwrt.org> CC: Prafulla Wadaskar <prafulla@marvell.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-065-278/+356
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| * board:trats2: fix default partitions and mmc envPiotr Wilczek2013-12-311-1/+2
| | | | | | | | | | | | | | | | | | This patch add uuid disk to defualt partions necessary to restore gpt partitions and fixes mmcdev environmental variable. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * SPL: EXYNOS: Prepare for variable size SPL supportRajeshwari Birje2013-12-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When variable size SPL is used, the BL1 expects the SPL to be encapsulated differently: instead of putting the checksum at a fixed offset in the SPL blob, prepend the blob with a header including the size and the checksum. The enhancements include - adding a command line option, '--vs' to indicate the need for the variable size encapsulation - padding the fixed size encapsulated blob with 0xff instead of random memory contents - do not silently truncate the input file, report error instead - no need to explicitly closing files/freeing memory, this all happens on exit; removing cleanups it makes code clearer - profuse commenting - modify Makefile to allow enabling the new feature per board Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Config: Add initial config for SMDK5420Rajeshwari Birje2013-12-303-280/+347
| | | | | | | | | | | | | | | | | | | | Adding initial config for SMDK5420 to build and boot U-Boot over Exynos based SMDK5420. Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos5420: Add base patch for SMDK5420Rajeshwari Birje2013-12-302-0/+2
| | | | | | | | | | | | | | | | | | | | | | Adding the base patch for Exynos based SMDK5420. This shall enable compilation and basic boot support for SMDK5420. Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: Create a common board fileRajeshwari Birje2013-12-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | Create a common board.c file for all functions which are common across all EXYNOS5 platforms. exynos_init function is provided for platform specific code. Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-01-0619-35/+123
|\ \ | |/ |/| | | | | | | | | | | Conflicts: include/micrel.h The conflict above was trivial, caused by four lines being added in both branches with different whitepace.
| * ARM: mx6: Change the FDT loading address to avoid overlapingOtavio Salvador2014-01-035-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes allow for the DeviceTree and initrd relocation fixing the boot of FSL 3.10.9-1.0.0-alpha kernel. This changes following boards: - mx6sabreauto - mx6sabresd - wandboard - udoo - nitrogen6x - cgtqmx6eval The reasoning, as explained by Hui Liu, is: ,---- | The FDT blob will be placed at DDR physical addr: 0x11000000. When Linux kernel | Boot up, it will decompress the compressed kernel image and place the decompressed | kernel image at the low end of the DDR memory and start running from it. If the | decompressed kernel image is bigger for example than 16M, it may over written the | fdt blob which u-boot loaded to the DDR memory @0x11000000 with fdt_addr=0x11000000 | | To expand the fdt_addr from 0x11000000 to 0x18000000, which can avoid the override | Since we will not likely have one kernel image larger than 128MB. `---- Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx28evk: Extend environment to easy write of NAND systemOtavio Salvador2014-01-031-1/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds following new targets: - update_nand_kernel - update_nand_fdt - update_nand_filesystem and to avoid confusion, the 'update_nand_full' has been renamed to 'update_nand_firmware_full'. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * mx28evk: Add 'nandboot' environment commandOtavio Salvador2014-01-031-1/+17
| | | | | | | | | | | | | | | | | | This reads the kernel, ftd and boot into ubifs filesystem. While on that, the SD firmware filename definition has been moved next to the other SD related commands. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx28evk: Use 512k for fdt partition to align itOtavio Salvador2014-01-031-1/+1
| | | | | | | | | | | | | | | | Using 512k for fdt partition allow it to be aligned with the other small partitions and 512k erase block size. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx6: soc: Add the required LDO ramp up delayFabio Estevam2014-01-021-0/+1
| | | | | | | | | | | | | | | | | | | | When changing LDO voltages we need to wait for the required amount of time for the voltage to settle. Also, as the timer is still not available when arch_cpu_init() is called, we need to call it later at board_postclk_init() phase. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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