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path: root/include/configs/x86-chromebook.h
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* x86: Drop CONFIG_DCACHE_RAM_MRC_VAR_SIZE from header fileSimon Glass2015-08-051-1/+0
| | | | | | | This is provided in Kconfig so we don't need it here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move CONFIG_X86_SERIAL to KconfigSimon Glass2015-08-051-2/+0
| | | | | | | Move this config option to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move Chrome OS options to defconfigSimon Glass2015-08-051-3/+0
| | | | | | | Drop these from the header file and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move VGA option rom macros to KconfigBin Meng2015-07-141-3/+0
| | | | | | | | | | Move X86_OPTION_ROM_FILE & X86_OPTION_ROM_ADDR to arch/x86/Kconfig and rename them to VGA_BIOS_FILE & VGA_BIOS_ADDR which depend on HAVE_VGA_BIOS. The new names are consistent with other x86 binary blob options like HAVE_FSP/FSP_FILE/FSP_ADDR. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.hBin Meng2015-06-041-1/+0
| | | | | | | | | | | | | | | Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect DRAM size printed when booting from coreboot, like this: CPU: x86, vendor Intel, device 663h DRAM: 636 KiB Using default environment Change it to 8 which should be enough for both coreboot and bare cases, and move it to x86-common.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Move common Chromebook config into a separate fileSimon Glass2015-04-161-0/+68
Since Chromebooks mostly have similar configuration, put it in a common file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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