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* sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION optionFabio Estevam2012-02-121-0/+1
| | | | | | | | | | | | | | | | | | | Since commit 97039ab98 (env_mmc: Allow board code to override the environment address) mmc_get_env_addr is a weak-aliased function in common/env_mmc.c The mmc_get_env_addr implementation that exists at board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards, but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined. Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate this config option on their board file. This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefano Babic <sbabic@denx.de>
* powerpc/p3060qds: Add board related support for P3060QDS platformShengzhou Liu2011-11-291-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | The P3060QDS is a Freescale reference board for the six-core P3060 SOC. P3060QDS Board Overview: Memory subsystem: - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus) - 128M Bytes NOR flash single-chip memory - 16M Bytes SPI flash - 8K Bytes AT24C64 I2C EEPROM for RCW Ethernet: - Eight Ethernet controllers (4x1G + 4x1G/2.5G) - Three VSC8641 PHYs on board (2xRGMII + 1xMII) - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3 PCIe: Two PCI Express 2.0 controllers/ports USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board I2C: Four I2C controllers UART: Supports two dUARTs up to 115200 bps for console RapidIO: Two RapidIO, sRIO1 and sRIO2 Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: clean up and document the QE/FMAN microcode macrosTimur Tabi2011-11-291-6/+10
| | | | | | | | | | | | | | | | | | | | Several macros are used to identify and locate the microcode binary image that U-boot needs to upload to the QE or Fman. Both the QE and the Fman use the QE Firmware binary format to package their respective microcode data, which is why the same macros are used for both. A given SOC will only have a QE or an Fman, so this is safe. Unfortunately, the current macro definition and usage has inconsistencies. For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address of NAND. There's no way to know by looking at a variable how it's supposed to be used. In the future, the code which uploads QE firmware and Fman firmware will be merged. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* common: cosmetic: CONFIG_BOOTFILE checkpatch complianceJoe Hershberger2011-10-221-1/+1
| | | | | | | | | Remove MK_STR from places that consume CONFIG_BOOTFILE to force all definitions to be string literals. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* common: cosmetic: CONFIG_ROOTPATH checkpatch complianceJoe Hershberger2011-10-221-1/+1
| | | | | | | | | Remove MK_STR from places that consume CONFIG_ROOTPATH to force all definitions to be string literals. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* board configs: drop NET_MULTI referencesMike Frysinger2011-10-051-1/+0
| | | | | | | Now that none of the core checks CONFIG_NET_MULTI, there's not much point in boards defining it. So scrub all references to it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* powerpc/85xx: Refactor some defines out of corenet_ds.hKumar Gala2011-10-031-8/+1
| | | | | | | | | | | Move some SoC/board specific defines out of corenet_ds.h and into the corresponding P3041DS/P4080DS/P5020.h. We moved CONFIG_MMC, CONFIG_PCIE3, & CONFIG_FSL_NGPIXIS because the P3060 SoC/reference board does not have these devices and it will share the same board code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p4080: Add support for secure boot flowRuchika Gupta2011-10-031-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | Pre u-boot Flow: 1. User loads the u-boot image in flash 2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000 (Please note that ISBC expects all these addresses, images to be validated, entry point etc within 0 - 3.5G range) 3. ISBC validates the u-boot image, and passes control to u-boot at 0xcffffffc. Changes in u-boot: 1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M CONFIG_SYS_PBI_FLASH_WINDOW in AS=1. (The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash created by PBL/configuration word within 0 - 3.5G memory range. The u-boot image at this address has been validated by ISBC code) 2. Remove TLB entries for 0 - 3.5G created by ISBC code 3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by PBL/configuration word after switch to AS = 1 Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com> Acked-by: Wood Scott-B07421 <B07421@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable CMD_REGINFO on corenet boardsKumar Gala2011-09-291-0/+1
| | | | | | | Useful for various debug to know how various regsters might be set in a human readable form. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add FMan ethernet support to P4080DSAndy Fleming2011-09-291-1/+3
| | | | | | | | | | | | | | | | | | | | | | | Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P4080DS. The board supports add-on cards for SGMII and XAUI functionality. Which slots on the board these cards are in is a function of the SERDES option selected and muxes on the board. Additionally because of the high-configurablity which MDIO bus one is connected to is "selected" via an FPGA register. We create dummy MDIO bus for the phy layer and hide the mux manipulation in this dummy layer. Add fman fdt helper function in board common code it'll be used by several freescale boards that do various muxing of the MDIO signals based on which controller/interface one is trying to talk to. Removed CONFIG_SYS_FMAN_FW as its not used anywhere. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macrosTimur Tabi2011-09-291-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS. This is necessary for the assembly-language code that relocates CCSR, since the assembler does not understand 64-bit constants. CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it should not be defined in a board header file. Similarly, CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so it should also not be defined in the board header file. CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT, and so CCSR will not be relocated. Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot builds (e.g. NAND) are required to relocate CCSR only during the last stage (i.e. the "real" U-Boot). All other stages should define CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated. README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: enable USB2 gadget mode for corenet ds boardShaohui Xie2011-07-291-0/+1
| | | | | | | | | | to make USB2 worked in gadget mode, we need to set it's 'dr_mode' to 'peripheral' in hwconfig, but driver starts scan from 'usb1', it'll break out if it cannot find 'usb1', so drop the 'else' clause to make driver scan all the 'usbx'. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fman: insert the Fman firmware into the device treeTimur Tabi2011-07-221-6/+20
| | | | | | | | | | | | The Fman device tree node binding allows for the entire Fman firmware binary data to be embedded in the device tree. This eliminates the need to have NOR flash mapped to Linux just so that the Fman driver can see the firmware. The location of the Fman firmware is taken from the 'fman_ucode' environment variable. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add default usb mode and phy type to hwconfigRamneek Mehresh2011-07-111-1/+8
| | | | | | | | | | | Move to use hwconfig for usb mode & phy type instead of magic 'usb_phy_type' environment variable on the following platforms: MPC8536DS, P1020RDB, P1020RDB-PC, P1010RDB, P2020RDB, P2020RDB-PC, P2020RDB, P3041DS, P4080DS, & P5020DS. Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: add back buffer write for NOR flashYork Sun2011-07-111-0/+1
| | | | | | | | | Enable buffer write for better performance. This platform uses a NOR flash chip which supports write buffer programming. CFI driver can query the buffer size and use it to program the flash for best performance. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add NAND boot support for P3041/P5020DSShaohui Xie2011-07-111-6/+23
| | | | | | | When booting from NAND we get the environment and FMan ucode from NAND. Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: add support for env in MMC/SPI on corenet ds boardsShaohui Xie2011-05-181-8/+22
| | | | | Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable eSPI support on corenet ds boardsShaohui Xie2011-05-181-0/+10
| | | | | Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 64M on FSL 85xx boardsKumar Gala2011-04-291-3/+3
| | | | | | | | CONFIG_SYS_BOOTMAPSZ has been 64M on these boards for some time so we should also allow the kernel image to be up to 64M decompressed. This also matches what we pass to the OS based on the ePAPR specification. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)Kumar Gala2011-04-271-0/+38
| | | | | | | | | | | | | | | | The P3041DS & P5020DS boards are almost identical (except for the processor in them). Additionally they are based on the P4080DS board design so we use the some board code for all 3 boards. Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock configuration. Additionally, the P3041DS/P5020DS support NAND. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix Wrong PCIe 3 virtual address on corenet_ds platformsTrübenbach, Ralf2011-04-271-1/+1
| | | | | | | | | | | | | | This patch fixes a wrong address define in corenet_ds.h (used by P4080DS.h, P3041DS.h, P5020DS.h). Since board/Freescale/corenet_ds/tlb.c does not use the CONFIG_SYS_PCIE3_MEM_VIRT define (uses CONFIG_SYS_PCIE1_MEM_VIRT with a fix offset instead) this has no effect to the functionality. But it may be important for changes in the future? Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* common: add a grepenv commandKim Phillips2011-04-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot environments, esp. when boards are shared across multiple users, can get pretty large and time consuming to visually parse. The grepenv command this patch adds can be used in lieu of printenv to facilitate searching. grepenv works like printenv but limits its output only to environment strings (variable name and value pairs) that match the user specified substring. the following examples are on a board with a 5313 byte environment that spans multiple screen pages: Example 1: summarize ethernet configuration: => grepenv eth TSEC etact=FM1@DTSEC2 eth=FM1@DTSEC4 ethact=FM1@DTSEC2 eth1addr=00:E0:0C:00:8b:01 eth2addr=00:E0:0C:00:8b:02 eth3addr=00:E0:0C:00:8b:03 eth4addr=00:E0:0C:00:8b:04 eth5addr=00:E0:0C:00:8b:05 eth6addr=00:E0:0C:00:8b:06 eth7addr=00:E0:0C:00:8b:07 eth8addr=00:E0:0C:00:8b:08 eth9addr=00:E0:0C:00:8b:09 ethaddr=00:E0:0C:00:8b:00 netdev=eth0 uprcw=setenv ethact $eth;setenv filename p4080ds/R_PPSXX_0xe/rcw_0xe_2sgmii_rev2_high.bin;setenv start 0xe8000000;protect off all;run upimage;protect on all upuboot=setenv ethact $eth;setenv filename u-boot.bin;setenv start eff80000;protect off all;run upimage;protect on all upucode=setenv ethact $eth;setenv filename fsl_fman_ucode_P4080_101_6.bin;setenv start 0xef000000;protect off all;run upimage;protect on all usdboot=setenv ethact $eth;tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/initramfs.cpio.gz.uboot;tftp c00000 $dir/p4080ds-usdpaa.dtb;setenv bootargs root=/dev/ram rw console=ttyS0,115200 $othbootargs;bootm 1000000 2000000 c00000; => Example 2: detect unused env vars: => grepenv etact etact=FM1@DTSEC2 => Example 3: reveal hardcoded variables; e.g., for fdtaddr: => grepenv fdtaddr fdtaddr=c00000 nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr => grep $fdtaddr fdtaddr=c00000 my_boot=bootm 0x40000000 0x41000000 0x00c00000 my_dtb=tftp 0x00c00000 $prefix/p4080ds.dtb nohvboot=tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/$ramdiskfile;tftp c00000 $dir/$fdtfile;setenv bootargs root=/dev/ram rw ramdisk_size=0x10000000 console=ttyS0,115200;bootm 1000000 2000000 c00000; => This patch also enables the grepenv command by default on corenet_ds based boards (and repositions the DHCP command entry to keep the list sorted). Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* powerpc/85xx: Add PBL boot from SPI flash support on P4080DSShaohui Xie2011-04-101-1/+26
| | | | | | | | | | | | | PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as 1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from CPC after PBL completes RCW and PBI phases. Signed-off-by: Chunhe Lan <b25806@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Drop CONFIG_VIDEO support on corenet_ds boardsKumar Gala2011-04-091-23/+0
| | | | | | | | We don't really ever use Video cards on corenet_ds style boards and its bloating our image which is close the its max size. Drop support and also kill some defines for non-PNP PCI which we never use. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Refactor Qman/Portal support to be shared between SoCsHaiying Wang2011-04-041-0/+1
| | | | | | | | | | | | | | There are some differences between CoreNet (P2040, P3041, P5020, P4080) and and non-CoreNet (P1017, P1023) based SoCs in what features exist and the memory maps. * Rename various immap defines to remove _CORENET_ if they are shared * Added P1023/P1017 specific memory offsets * Only setup LIODNs or LIODN related code on CORENET based SoCs (features doesn't exist on P1023/P1017) Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* corenet_ds: Enable ECC for corenet_dsYork Sun2011-01-191-1/+1
| | | | | | | | ECC can be turned on/off by hwconfig without recompiling. So enable it by default. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Introduce 85xx, 86xx, QorIQ config headersKumar Gala2011-01-191-2/+0
| | | | | | | | | | | Add new headers that capture common defines for a given SoC/processor rather than duplicating that information in board config.h and random other places. Eventually this should be handled by Kconfig & defconfigs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.hKumar Gala2011-01-191-0/+4
| | | | | | | | | | | Rather than defining it config.mk we can set it in config.h and remove config.mk from several boards that don't need it. We mimic what 4xx does and introduce CONFIG_RESET_VECTOR_ADDRESS for config.h to set. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: Bump up the CONFIG_SYS_BOOTM_LEN to 16M on FSL 85xx boardsKumar Gala2011-01-141-0/+1
| | | | | | | CONFIG_SYS_BOOTMAPSZ has been 16M on these boards for some time so we should also allow the kernel image to be up to 16M decompressed. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Refactor SRIO initialization into common codeKumar Gala2011-01-141-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Moved the SRIO init out of corenet_ds and into common code for 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe controllers for SRIO. We utilize the fact that SRIO is over serdes to determine if its configured or not and thus can setup the LAWs needed for it dynamically. We additionally update the device tree (to remove the SRIO nodes) if the board doesn't have SRIO enabled. Introduced the following standard defines for board config.h: CONFIG_SYS_SRIO - Chip has SRIO or not CONFIG_SRIO1 - Board has SRIO 1 port available CONFIG_SRIO2 - Board has SRIO 2 port available (where 'n' is the port #) CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup) CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup) [ These mimic what we have for PCI and PCIe controllers ] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: Replace CONFIG_SYS_HAS_SERDES with a weak functionKumar Gala2011-01-141-1/+0
| | | | | | Instead of a #define use a null weak function for fsl_serdes_init Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p4080ds: Move ICS refclk define into P4080DS.hKumar Gala2010-11-121-1/+0
| | | | | | | We appear to have different refclk's on the different corenet DS boards so move the define out of the common header. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: Move CONFIG_SYS_TEXT_BASE into corenet_ds.hKumar Gala2010-11-121-0/+4
| | | | | | | CONFIG_SYS_TEXT_BASE setting is common across the 'corenet_ds' board family so move it out of P4080DS.h and into corenet_ds.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: Enable DHCP suportKumar Gala2010-11-121-0/+1
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated valueWolfgang Denk2010-10-261-2/+1
| | | | | | | | | | | | | | | | | | CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZEWolfgang Denk2010-10-261-2/+2
| | | | | | | | | | | | | | | | | | CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be some end address; to make the meaning more clear we rename it into CONFIG_SYS_INIT_RAM_SIZE No other code changes are performed in this patch, only minor editing of white space (due to the changed length) and the comments was done, where noticed. Note that the code for the PATI and cmi_mpc5xx board configurations looks seriously broken. Last known maintainers on Cc: Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Denis Peter <d.peter@mpl.ch> Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* corenet_ds: Update CONFIG_SYS_GBL_DATA_SIZE to deal with growth in gd_tKumar Gala2010-10-221-1/+1
| | | | | | | The recent change the env code added an additional 32 bytes into gd_t and that causes to grow pass the previous CONFIG_SYS_GBL_DATA_SIZE size. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Adding fixed sdram setting for cornet_ds boardYork Sun2010-10-201-59/+1
| | | | | | | | | | | | | | | 800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram setting. SPD based parameters and fixed parameters can be toggled by hwconfig. To use fixed parameters, hwconfig=fsl_ddr:sdram=fixed To use SPD parameters, hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Enable POST memory test for corenet_dsYork Sun2010-10-201-0/+1
| | | | | Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Cleanup BOOTFLAG_* referencesPeter Tyser2010-10-181-8/+0
| | | | | | | | | | | | Now that warm booting is not supported, there isn't a need for the BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them. Note that this change makes the board info bd_bootflags field useless. It will always be set to 0, but we leave it around so that we don't break the board info structure that some OSes are expecting to be passed from U-Boot. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-181-2/+2
| | | | | | | | | | | | The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: Add support for 4th PCI controller on corenet_dsKumar Gala2010-10-071-0/+8
| | | | | | | We configure the controller but dont have virtual address space thus any devices on the 4th controller are not accessible in u-boot. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: Various updates to initial env cfgEmil Medve2010-10-071-6/+9
| | | | | | | | | | | * Make the U-Boot update command sequence conditional. Helps prevent accidental erasing if an upload or previous step fails * Make it easier to update other FLASH banks * Enable DDR controller cache line interleaving and bank cs0/cs1 by default Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Prepare v2010.09-rc1Wolfgang Denk2010-09-101-1/+1
| | | | | | Coding style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
* powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.york2010-08-191-1/+1
| | | | | | | | | The board specific parameters associated with quad rank dimms where missing. This fixes it so the board will function if quad rank dimms are placed in it. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p4080: Add support for the P4080DS boardKumar Gala2010-08-011-0/+653
Add support for the P4080DS board, with the following features: * 36-bit only * Boots from NOR flash * FMAN drivers NOT supported * SPD DDR initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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