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| * | | exynos: video: Convert several boards to driver model for videoSimon Glass2016-05-253-198/+357
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update several boards to use driver model for video. This involves changes to the EDP and FIMD (frame buffer) drivers. Existing PWM, simple-panel and pwm-backlight drivers are used. These work without additional configuration since they use the device tree settings in the same way as Linux. Boards converted are: - snow - spring - peach-pit - peach-pi All have been tested. Not converted: - MIPI display driver - s5pc210_universal - smdk5420 - smdk5250 - trats - trats2 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Rename variables for driver modelSimon Glass2016-05-254-372/+369
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use 'priv' for a private pointer and 'regs' for a register pointer. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Rename edp_device_info to exynos_dp_privSimon Glass2016-05-253-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename this function to better fit with driver model. It is the private data for the exynos EDP driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: Simplify calling of exynos_dp_phy_ctrl()Simon Glass2016-05-251-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function controls enabling the EDP PHY. Rename it and drop the existing weak functions, which are confusing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: pwm: Add a driver for the exynos5 PWMSimon Glass2016-05-253-0/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver supports the standard PWM API. There are 5 PWMs. Four are used normally and the last is normally used as a timer. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Combine LCD driver into one fileSimon Glass2016-05-253-406/+387
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present exynos_fimd.c is the controller and exynos_fb.c is the U-Boot LCD interface. With driver model we want these in one file, so join them in preparation. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Move mipi_lcd_device_dt into a functionSimon Glass2016-05-251-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for making this a parameter, move it into the function that sets it up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Move struct exynos_platform_mipi_dsim into vidinfoSimon Glass2016-05-252-16/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Put the pointer to this structure in struct vidinfo so that we can reference it without it being global. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Move dsim_config_dt into a functionSimon Glass2016-05-251-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for making this a parameter, move it into the function that sets it up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Drop static variables in exynos_dp_lowlevel.cSimon Glass2016-05-253-285/+351
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop these and use parameters instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Drop static variables in exynos_fb.cSimon Glass2016-05-251-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop these and use the existing variables instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Drop static variables in exynos_fimd.cSimon Glass2016-05-252-23/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop these and use parameters instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Drop the static lcd_base_addr variableSimon Glass2016-05-253-34/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop this and use parameters instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Remove use of vidinfo_t typedefSimon Glass2016-05-253-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use 'struct vidinfo' instead so that we can change this to a struct with a different name in future. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Drop dead codeSimon Glass2016-05-254-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always use device tree with video, so can drop these #ifdefs. Some of the hardware addresses are not needed either. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | exynos: video: Move driver files into their own directorySimon Glass2016-05-2515-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move all the exynos video drivers into one place for ease of maintenance. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | serial: s5p: use clock api to get clock rateThomas Abraham2016-05-251-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Exynos platforms that support clock driver API, allow the driver to use clock api get the SCLK clock rate. Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | serial: s5p: get the port id number from the alias of the device nodeThomas Abraham2016-05-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The port id, if not specified in the device node, can be obtained from the alias of the device node listed in the aliases node. Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | clk: exynos: add clock driver for Exynos7420 SocThomas Abraham2016-05-257-0/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | pinctrl: Add pinctrl driver support for Exynos7420 SoCThomas Abraham2016-05-257-0/+359
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes have been split into Exynos7420 specific and common Exynos specific portions so that this implementation is reusable on other Exynos SoCs as well. The Exynos pinctrl driver supports only device tree based pin configuration. The bindings used are similar to the ones used in the linux kernel. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devicesThomas Abraham2016-05-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is possible to have multiple pin controllers in the system. Use the DM_UC_FLAG_SEQ_ALIAS flag so that the pinctrl instances are assigned a sequence number. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-06-062-7/+7
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modified: configs/ls1012afrdm_qspi_defconfig configs/ls1012aqds_qspi_defconfig configs/ls1012ardb_qspi_defconfig include/configs/ls1012afrdm.h include/configs/ls1012aqds.h include/configs/ls1012ardb.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | | usb: move CONFIG_USB_XHCI_DWC3 to KconfigMasahiro Yamada2016-06-041-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create an entry for "config USB_XHCI_DWC3" in Kconfig and switch over to it for all boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | | usb: move CONFIG_USB_XHCI to Kconfig with renamingMasahiro Yamada2016-06-042-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it into CONFIG_USB_XHCI_HCD. As commented in the help of "config USB_XHCI" entry, this has been a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI have been unified in favor of the former. Note: Some boards define CONFIG_USB_XHCI in their headers without CONFIG_USB, which does not meet the "depends on" in Kconfig. I added CONFIG_USB=y for those boards when converting. Otherwise, they would fail to build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-06-045-0/+322
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| * | | | | dm: test: Add GPIO open drain testsmario.six@gdsys.cc2016-06-031-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some tests for the new open drain setting feature of the GPIO uclass, and extend the capabilities of the sandbox GPIO driver accordingly. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | | dm: gpio: Implement open drain for MPC85XX GPIOmario.six@gdsys.cc2016-06-032-3/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements the open-drain setting feature for the MPC85XX GPIO controller. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | | dm: gpio: Add methods for open drain settingmario.six@gdsys.cc2016-06-031-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain GPIO devices have the capability to switch their GPIOs into open-drain mode, that is, instead of actively driving the output (Push-pull output), the pin is connected to the collector (for a NPN transistor) or the drain (for a MOSFET) of a transistor, respectively. The pin then either forms an open circuit or a connection to ground, depending on the state of the transistor. This patch adds functions to the GPIO uclass to switch GPIOs to open-drain mode on devices that support it. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | | dm: gpio: Add driver for MPC85XX GPIO controllermario.six@gdsys.cc2016-06-033-0/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the built-in GPIO controller of the MPC85XX SoC (probably supporting other PowerQUICC III SoCs as well). Each GPIO bank is identified by its own entry in the device tree, i.e. gpio-controller@fc00 { #gpio-cells = <2>; compatible = "fsl,pq3-gpio"; reg = <0xfc00 0x100> } By default, each bank is assumed to have 32 GPIOs, but the ngpios setting is honored, so the number of GPIOs for each bank in configurable to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of the P1022 SoC). The usual functions of GPIO drivers (setting input/output mode and output value setting) are supported. The driver has been tested on MPC85XX, but it is likely that other PowerQUICC III devices will work as well. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* | | | | | Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-06-0441-2262/+891
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| * | | | | nand: fix nand torture to use changed mtd apiMax Krummenacher2016-06-031-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mtd subsystem deprecated and renamed the direct use of the mtd_info struct's functionpointers. Instead the corresponding mtd_xxx function should be used. See also: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=3c3c10bba1e4ccb75b41442e45c1a072f6cded19 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| * | | | | mtd: nand: Sync with Linux v4.6Scott Wood2016-06-0317-171/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates the NAND code to match Linux v4.6. The previous sync was from Linux v4.1 in commit d3963721d93fafa. Note that none of the individual NAND drivers tracked Linux closely enough to be synced themselves, other than manually applying a few cross-tree changes. Signed-off-by: Scott Wood <oss@buserror.net> Tested-by: Heiko Schocher <hs@denx.de>
| * | | | | mtd: nand: Add page argument to write_page() etc.Scott Wood2016-06-0314-46/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is part of the Linux 4.6 sync. It is being done before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | | | mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_dataScott Wood2016-06-0330-307/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are part of the Linux 4.6 sync. They are being added before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | | | nand: Embed mtd_info in struct nand_chipScott Wood2016-06-0320-172/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | | | mtd: nand: Remove nand_info_t typedefScott Wood2016-06-037-100/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This typedef serves no purpose other than causing confusion with struct nand_chip. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | | | mtd: nand: Remove docg4 driver and palmtreo680 flashing toolScott Wood2016-06-033-1251/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ad4f54ea86b ("arm: Remove palmtreo680 board") removed the only user of the docg4 driver and the palmtreo680 image flashing tool. This patch removes them. Signed-off-by: Scott Wood <oss@buserror.net> Cc: Mike Dunn <mikedunn@newsguy.com> Cc: Simon Glass <sjg@chromium.org>
| * | | | | mtd: nand: Remove jz4740 driverMarek Vasut2016-06-032-259/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is not used by anyone, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Scott Wood <oss@buserror.net> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Scott Wood <oss@buserror.net>
| * | | | | mtd: nand: arasan_nfc: Correct nand ecc initializationSiva Durga Prasad Paladugu2016-06-031-9/+9
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the nand ecc initialization code This fixes the issue of incorrect nand ecc init if no device is found in ecc_matrix then it endsup ecc init with junk initialization instead of the most suited one. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-06-047-33/+49
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| * | | | | driver: mtd: spi: Adding support for QSPI flashPrabhakar Kushwaha2016-06-032-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Serial number, vendor id and page size are added for QSPI flash common on both LS1012AQDS and LS1012ARDB i.e. S25FS512SDSMFI011. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | | driver/ddr/fsl: Check condition for erratum A-009803Shengzhou Liu2016-06-031-19/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add condition of checking the enabled of address parity for erratum A-009803, if parity is not enabled, the workaround of erratum A-009803 should not be applied. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | | drivers/ddr/fsl: Disabling data init if ECC is not enabledYork Sun2016-06-031-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If ECC is not enabled, data init can be disabled to speed up booting. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | | | pcie/layerscape: fix bug in bus number computation when setting msi-mapBogdan Purcareata2016-06-031-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When multiple PCI cards are present in an ls2080a board, the second card does not get its msi-map set up properly due to a bug in computing the bus number. The bus number returned by PCI_BDF() is not the actual PCI bus number, but instead represents a global u-boot PCI bus number. A given bus number is relative to hose->first_busno, so that has to be subtracted from the PCI device id. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Acked-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | | drivers/ddr/fsl: Fix timing_cfg_2 registerYork Sun2016-06-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 34e026f9 added one extra bit to wr_lat for timing_cfg_2, but with wrong bit position. It is bit 13 in big-endian, or left shift 18 from LSB. This error hasn't had any impact because we don't have fast enough DDR4 using the extra bit so far. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | | | mmc: fsl_esdhc: fix check_and_invalidate_dcache_range functionYangbo Lu2016-06-031-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In function check_and_invalidate_dcache_range(), there are incorrect start address and end address of the dcache range calculated for Layerscape platforms. This patch is to fix this issue. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | | drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntlShengzhou Liu2016-06-031-2/+9
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clk_adjust is of SDRAM_CLK_CNTL[5:8] 4-bits on MPC85xx and P-series, but is of SDRAM_CLK_CNTL[5:9] 5-bits on T-series and LS-series SoCs. We should update it to adapt the case that clk_adjust is odd data. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-06-036-2/+396
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| * | | | mmc: tegra: add basic Tegra186 supportStephen Warren2016-05-311-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | | gpio: add Tegra186 GPIO driverStephen Warren2016-05-315-1/+358
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186's GPIO controller register layout is significantly different from previous chips, so add a new driver for it. In fact, there are two different GPIO controllers in Tegra186 that share a similar register layout, but very different port mapping. This driver covers both. The DT binding is already present in the Linux kernel (in linux-next via the Tegra tree so far). Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> # v1 Signed-off-by: Tom Warren <twarren@nvidia.com>
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