summaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Collapse)AuthorAgeFilesLines
* usb: ehci: add Faraday USB 2.0 EHCI supportKuo-Jung Su2013-06-123-0/+154
| | | | | | | | | | | | | | | | | | | This patch adds support to both Faraday FUSBH200 and FOTG210, the differences between Faraday EHCI and standard EHCI are listed bellow: 1. The PORTSC starts at 0x30 instead of 0x44. 2. The CONFIGFLAG(0x40) is not only un-implemented, and also has its address space removed. 3. Faraday EHCI is a TDI design, but it doesn't compatible with the general TDI implementation found at both U-Boot and Linux. 4. The ISOC descriptors differ from standard EHCI in several ways. But since U-boot doesn't support ISOC, we don't have to worry about that. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* usb: ehci: add weak-aliased function for PORTSCKuo-Jung Su2013-06-121-4/+13
| | | | | | | | | | | | | | There is at least one non-EHCI compliant controller (i.e. Faraday EHCI) not only leave RESERVED and CONFIGFLAG registers un-implemented but also has their address spaces removed. As an result, the PORTSC register of Faraday EHCI always starts from 0x30 instead of 0x44 in standard EHCI. So that we'll need a weak-aliased function for abstraction. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* usb: ehci: prevent bad PORTSC register accessKuo-Jung Su2013-06-121-5/+15
| | | | | | | | | | | | | | | | 1. The 'index' of ehci_submit_root() is not always > 0. e.g. While it gets invoked from usb_get_descriptor(), the 'index' is always a '0'. (See ch.9 of USB2.0) 2. The PORTSC register is not always required, and thus it should only report a port error when necessary. It would cause a port scan failure if the ehci_submit_root() always gets terminated by a port error. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* usb: gadget: Use unaligned access for wMaxPacketSizeVivek Gautam2013-06-122-7/+9
| | | | | | | | | | | | Use get_unaligned() while fetching wMaxPacketSize to avoid voilating any alignment rules. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Piotr Wilczek <p.wilczek@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Dalek <luk0104@gmail.com> Cc: Marek Vasut <marex@denx.de>
* usb: asix: Move software resets to basic_initJulius Werner2013-06-121-23/+17
| | | | | | | | | | | | | | | | | | | | | | | | The ASIX driver calls a basic_init() function during get_info(), so that not all initialization tasks need to be redone on every init(). Unfortunately, the most important one is still triggered too often: the driver does a full port and MII reset on every asix_init(), requiring up to several seconds to reestablish the link. This patch confines that software reset into the asix_basic_init() function so that it will only be executed once. This saves about a second of boot time on systems using BOOTP. Note: this patch was previously submitted many moons ago as: usb: usbeth: asix: Do a fast init if link already established That patch seens to have been lost or forgotten, so this is a rebased version. It is tested on snow with a Asix USB dongle (Cisco). Signed-off-by: Julius Werner <jwerner@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* usb: Correct CLEAR_FEATURE code in ehci-hcdSimon Glass2013-06-121-4/+6
| | | | | | | | | | | | | | | This commit broke USB2 on link (Chromebook Pixel): 020bbcb usb: hub: Power-cycle on root-hub ports However the root cause seems to be a missing mask and missing 'break' in ehci-hcd.c. This patch fixes both. On link, 'usb start' with a USB keyboard and memory stick inserted now finds both. The keyboard works as expected. Also ext2ls shows a directory listing from the memory stick. Signed-off-by: Simon Glass <sjg@chromium.org>
* pci: introduce CONFIG_PCI_INDIRECT_BRIDGE optionGabor Juhos2013-06-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_indirect.c file is always compiled when CONFIG_PCI is defined although the indirect PCI bridge support is not needed by every board. Introduce a new CONFIG_PCI_INDIRECT_BRIDGE config option and only compile indirect PCI bridge support if this options is enabled. Also add the new option into the configuration files of the boards which needs that. Compile tested for powerpc, x86, arm and nds32. MAKEALL results: powerpc: --------------------- SUMMARY ---------------------------- Boards compiled: 641 Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB ) ---------------------------------------------------------- Note: the warnings for ELPPC and MPC8323ERDB are present even without the actual patch. x86: --------------------- SUMMARY ---------------------------- Boards compiled: 1 ---------------------------------------------------------- arm: --------------------- SUMMARY ---------------------------- Boards compiled: 311 ---------------------------------------------------------- nds32: --------------------- SUMMARY ---------------------------- Boards compiled: 3 ---------------------------------------------------------- Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2013-06-071-6/+9
|\
| * cfb_console: flush FB cache at end of public functionsEric Nelson2013-05-061-6/+9
| | | | | | | | | | | | | | | | Removed internal cache_flush operations and placed a flush of the entire frame-buffer at the end of each public function. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-06-071-0/+2
|\ \
| * | bug, nand, am33xx: nand->ecc.strength not set in board_nand_init()Sergey Lapin2013-06-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit dfe64e2c89731a3f9950d7acd8681b68df2bae03 Author: Sergey Lapin <slapin@ossfans.org> Date: Mon Jan 14 03:46:50 2013 +0000 mtd: resync with Linux-3.7.1 Introduced runtime bug: U-Boot 2013.04-00499-g46567df-dirty (Jun 04 2013 - 08:17:08) I2C: ready DRAM: 512 MiB WARNING: Caches not enabled NAND: BUG: failure at nand_base.c:3214/nand_scan_tail()! BUG! resetting ... on boards using drivers/mtd/nand/omap_gpmc.c as in board_nand_init() nand->ecc.strength is not set. Fix this! Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* | | input: Finish simplifing key_matrix_decode_fdt()Stephen Warren2013-06-061-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | [trini: Applied v1 of the series rather than v2, this commit is the delta from v1 to v2] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Rini <trini@ti.com>
* | | Merge branch 'tpm' of git://git.denx.de/u-boot-x86Tom Rini2013-06-057-280/+462
|\ \ \
| * | | tpm: Reorganize the I2C TPM driverTom Wai-Hong Tam2013-06-035-268/+383
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does a similar code reogranzation from http://patchwork.ozlabs.org/patch/132179/ which is based on an old version of code (fdt support and bus selection still not in). It merges this tidy-up on top of the recent code. It does not make any logical change. tpm.c implements the interface defined in tpm.h based on underlying LPC or I2C TPM driver. tpm.c and the underlying driver communicate throught tpm_private.h. Note: Merging the LPC driver with tpm.c is left to future patches. Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C)Vincent Palatin2013-06-032-23/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
| * | | tpm: Rename generic_lpc_tpm to tpm_tis_lpcChe-liang Chiou2013-06-032-1/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new name is more aligned with Linux kernel's naming of TPM driver. Signed-off-by: Peter Huewe <peter.huewe@infineon.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
* | | input: simplify key_matrix_decode_fdt()Stephen Warren2013-06-041-40/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | We know the exact property names that the code wants to process. Look these up directly with fdt_get_property(), rather than iterating over all properties within the node, and checking each property's name, in a convoluted fashion, against the expected name. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | | input: fix unaligned access in key_matrix_decode_fdt()Stephen Warren2013-06-041-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | Initialized character arrays on the stack can cause gcc to emit code that performs unaligned accessess. Make the data static to avoid this. Note that the unaligned accesses are made when copying data to prefix[] on the stack from .rodata. By making the data static, the copy is completely avoided. All explicitly written code treats the data as u8[], so will never cause any unaligned accesses. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-05-3134-1518/+1834
|\ \
| * | mtd: resync with Linux-3.7.1Sergey Lapin2013-05-3134-1494/+1772
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is essentially an update of u-boot MTD subsystem to the state of Linux-3.7.1 with exclusion of some bits: - the update is concentrated on NAND, no onenand or CFI/NOR/SPI flashes interfaces are updated EXCEPT for API changes. - new large NAND chips support is there, though some updates have got in Linux-3.8.-rc1, (which will follow on top of this patch). To produce this update I used tag v3.7.1 of linux-stable repository. The update was made using application of relevant patches, with changes relevant to U-Boot-only stuff sticked together to keep bisectability. Then all changes were grouped together to this patch. Signed-off-by: Sergey Lapin <slapin@ossfans.org> [scottwood@freescale.com: some eccstrength and build fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand/fsl_ifc: Convert to self-initPrabhakar Kushwaha2013-05-221-5/+37
| | | | | | | | | | | | | | | | | | Convert NAND IFC driver to support CONFIG_SYS_NAND_SELF_INIT. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
| * | mtd: nand: use ssize_t instead of size_t to prevent infinite loophtbegin2013-05-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a all 0xFF buffer is passed to drop_ffs, the no-0xFF check loop will loop forever. After the fix, If ssize_t i = -1 and size_t l = i + 1, the value of l will still be 0 as expected. Signed-off-by: Tao Hou <hotforest@gmail.com> Cc: Ben Gardiner <bengardiner@nanometrics.ca> Cc: Scott Wood <scottwood@freescale.com>
| * | mtd: nand: fix the partial page write conditionhtbegin2013-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | When writelen is mtd->writesize - 1, it is still a partial page write Signed-off-by: Tao Hou <hotforest@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
| * | nand/fsl_elbc: detect page size at runtimeScott Wood2013-05-221-17/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids needing a separate U-Boot config when some revisions of a board have small-page NAND and other revisions have large-page NAND (except for NAND SPL targets). CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and it gets in the way of this change. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-3034-1030/+1976
|\ \ \ | | | | | | | | | | | | | | | | | | | | Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
| * | | sf: spansion: Add support for S25FL128SXie Xiaobo2013-05-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash memory have the same device ID and Memory architecture. So they can use the same config parameters. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | Enable XAUI interface for B4860QDSSuresh Gupta2013-05-241-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added SERDES2 PRTCLs = 0x98, 0x9E - Default Phy Addresses for Teranetics PHY on XAUI card The PHY addresses of Teranetics PHY on XAUI riser card are assigned based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1 and slot2 - Configure MDIO for 10Gig Mac Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | net/phy: fix select line for TN80xxShaohui Xie2013-05-241-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TN80xx has same PHY ID as TN2020, but it needs different setting to register 30.93 which used to select line, so we read register 30.32 which has bit 15:12 to indicate PHY hardware version, for TN20xx we will get 3 or 2, for TN80xx we will get 5 or 4. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | cfi_flash: return NULL for invalid base address inputMasahiro Yamada2013-05-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When base address given was out of valid flash address ranges, flash_get_info() function returned the pointer to the last element of flash_info[i] array. This patch changes this function to return NULL pointer in such a case, which is more correct behaviour. The function flash_protect_default() calls flash_protect() immediately after flash_get_info() invocation. With this correction, flash_protect() function would be able to return soon, for NULL flash_info. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | cosmetic: cfi_flash: delete a space after an unary operatorMasahiro Yamada2013-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux Kernel Documentation/CodingStyle says: Do not add a space after unary operators such as &, *, ... Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | | cfi_flash: Fix unaligned accesses to cfi_qry structureAndrew Gabbasov2013-05-231-6/+9
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Packed structure cfi_qry contains unaligned 16- and 32-bits members, accessing which causes problems when cfi_flash driver is compiled with -munaligned-access option: flash initialization hangs, probably due to data error. Since the structure is supposed to replicate the actual data layout in CFI Flash chips, the alignment issue can't be fixed in the structure. So, unaligned fields need using of explicit unaligned access macros. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Reviewed-By: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Stefan Roese <sr@denx.de>
| * | powerpc/esdhc: Correct judgement for DATA PIO modeHaijun.Zhang2013-05-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The logic for the whether to configure for polling or DMA was mistakenly reversed in this patch: Commit 7b43db92110ec2f15c5f7187a165f2928464966b drivers/mmc/fsl_esdhc.c: fix compiler warnings Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> CC: Sun Yusong-R58495 <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | mmc: update Faraday FTSDC010 for rw performanceKuo-Jung Su2013-05-153-688/+378
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Faraday FTSDC010 is a MMC/SD host controller. Although there is already a driver in current u-boot release, which is modified from eSHDC and contributed by Andes Tech. Its performance is too terrible on Faraday A36x SoC platforms, so I turn to implement this new version of driver which is 10+ times faster than the old one. It's carefully designed to be compatible with Andes chips, so it should be safe to replace it. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini2013-05-156-4/+113
| |\ \
| | * | T4/usb: move usb 2.0 utmi dual phy init code to cpu_init.cRoy Zang2013-05-141-21/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is what we have done for the UTMI PHY on P3041/P5020. Then the PHY initialization can be reused in kernel without “usb start” command. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | net/phy: add VSC8574 supportShaohui Xie2013-05-141-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes interfaces for quad-port dual media capability. This driver supports SGMII and QSGMII MAC mode. For now SGMII mode is tested. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | net/fm: fixup ethernet for mEMACShengzhou Liu2013-05-142-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - set proper compatible property name for mEMAC. - fixed ft_fixup_port for dual-role mEMAC, which will lead to MAC node disabled incorrectly. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | powerpc/mpc85xx: Add T4160 SoCYork Sun2013-05-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4160 SoC is low power version of T4240. The T4160 combines eight dual threaded Power Architecture e6500 cores and two memory complexes (CoreNet platform cache and DDR3 memory controller) with the same high-performance datapath acceleration, networking, and peripheral bus interfaces. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | T4/USB: Add USB 2.0 UTMI dual phy supportRoy Zang2013-05-141-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4240 internal UTMI phy is different comparing to previous UTMI PHY in P3041. This patch adds USB 2.0 UTMI Dual PHY new memory map and enable it for T4240. The phy timing is very sensitive and moving the phy enable code to cpu_init.c will not work. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * | Fman/t4240: some fix for 10G XAUIShaohui Xie2013-05-143-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. fix 10G mac offset by plus 8; 2. add second 10G port info for FM1 & FM2 when init ethernet info; 3. fix 10G lanes name to match lane protocol table; Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | Power: remove support for Freescale MPC8220Wolfgang Denk2013-05-151-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale MPC8220 Power Architecture processors have long reached EOL; Freescale does not even list these any more on their web site. Remove the code to avoid wasting maitaining efforts on dead stuff. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andy Fleming <afleming@gmail.com>
| * | | drivers/mmc: move spl_mmc.c to common/splYing Zhang2013-05-152-140/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mpc85xx repuires a special layout on the memory device that is connected to the eSDHC controller interface. But the file spl_mmc.c didn't handle this specfic case, there needs a special treatmen, in the powerpc drictory. So, there is no longer to keep spl_mmc.c on mpc85xx, CONFIG_SPL_FRAMEWORK is not set. When CONFIG_SPL_MMC_SUPPORT is set and CONFIG_SPL_FRAMEWORK is not set, there was an error in drivers/mmc/spl_mmc.c: drivers/mmc/libmmc.o:(.got2+0x8): undefined reference to `spl_image'. Now, the solution is to move the file "spl_mmc.c" to directory "common/spl". Signed-off-by: Ying Zhang <b40530@freescale.com>
| * | | smc911x: fix the timeout detectionMasahiro Yamada2013-05-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If timeout is occurred at the while loop above, the value of 'timeout' is -1, not 0. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | OMAP5: Enable USB Ethernet support with LAN9730Lubomir Popov2013-05-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added the LAN9730 to list of supported devices. This chip is used in the sEVM, uEVM and som5_evb. Tested on the som5_evb with dhcp and ping. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * | | bfin: Move gpio support for bf54x and bf60x into the generic driver folder.Sonic Zhang2013-05-132-0/+441
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx. A lot of machine macros are used to accomodate both code in one gpio driver. This patch split the old gpio driver and move new gpio2 support to the generic gpio driver folder. - To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's config header file. - The gpio2 driver supports bf54x, bf60x and future ADI processors, while the older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561. - All blackfin specific gpio function names are replaced by the generic gpio APIs. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | blackfin: The buf variable in bfin_mac.c is not used and produces warning,Marek Vasut2013-05-131-2/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | blackfin: Move blackfin serial driver out of blackfin arch folder.Sonic Zhang2013-05-132-0/+412
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move blackfin serial driver to the generic driver folder. - Move blackfin serial headers to blackfin arch head folder. - Update the include path to blackfin serial header in start up code. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | blackfin: Move blackfin watchdog driver out of the blackfin arch folder.Sonic Zhang2013-05-132-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined. - Move blackfin hw watchdog driver to the generic driver folder. - Call hw_watchdog_init() from blackfin board init code. - Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS - Update README.watchdog accordingly Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | bfin: discard invalid data and clear RXS in bf5xx spi driverScott Jiang2013-05-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There may be dirty data in RDBR, so we should discard invalid data. This operation also clears RXS bit in STAT register. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
| * | | bfin: Remove spi dma function in bf5xx.Scott Jiang2013-05-131-102/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | BF5xx rx dma causes spi flash random read error. Accually spi controller has problems both on tx and rx dma. So remove spi dma support in u-boot. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
OpenPOWER on IntegriCloud