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* mmc_write.c: Make mmc_berase do 32bit safe 64bit mathTom Rini2015-06-181-1/+11
| | | | | | | | | | | | | | We want to see if the requested start or total block count are unaligned. We discard the whole numbers and only care about the remainder. Update the code to use div_u64_rem here and add a comment. Cc: Hans de Goede <hdegoede@redhat.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
* mtd: OMAP: Enable GPMC prefetch mode for 16 bit accessJeroen Hofstee2015-06-181-10/+18
| | | | | | | | | | | | commit c316f57 "mtd: OMAP: Enable GPMC prefetch mode" only enabled prefetch mode for 8 bit nand access, this adds 16 bit as well. Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@konsulko.com> Cc: Daniel Mack <zonque@gmail.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap_gpmc: move prefetch out of CONFIG_NAND_OMAP_ELMJeroen Hofstee2015-06-181-109/+109
| | | | | | | | | | | | | The prefech mode is a feature of the gpmc, not the ELM. An am3517 does not have an elm, but can do prefeches, so move the code out of the CONFIG_NAND_OMAP_ELM ifdef. Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@konsulko.com> Cc: Daniel Mack <zonque@gmail.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Tom Rini <trini@konsulko.com>
* sunxi: musb: Remove unused sunxi_musb_exit methodHans de Goede2015-06-171-34/+0
| | | | | | | | | Remove the unused sunxi_musb_exit method, there is no code in u-boot calling the exit method, and our implementation was broken as it did not disable the clocks and asserted reset. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: musb: Do not fully reset the controler from sunxi_musb_disableHans de Goede2015-06-171-21/+31
| | | | | | | | | | | | | | Fully resetting the controller is a too big hammer, and the musb_core will then afterwards fail to communicate with any endpoints other then 0 as too much state was cleared. Instead report vbus low for 200ms which will effectively end the current session without needing to do a full reset. This fixes usb mass-storage devices no longer working after a "usb reset" Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* Merge git://git.denx.de/u-boot-usbTom Rini2015-06-154-2/+81
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| * usb: f_mass_storage: sleep_thread: decrease the interval for check ctrlc()Inha Song2015-06-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This change decreases the interval of calls to: - display busy indicator - check ctrlc() - check cable connection By this change, breaking the UMS command is more easy on Odroid XU3. Signed-off-by: Inha Song <ideal.song@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * samsung: usb: phy: Support for DWC3 PHYLukasz Majewski2015-06-082-0/+79
| | | | | | | | | | | | | | | | | | | | | | New files, namely samsung_usb_phy.c and samsung-usb-phy-uboot.h have been added to u-boot to provide proper PHY handling at Exynos5 SoCs. This code is used thereafter in the board_usb_init() call. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * drivers: usb: fsl: Return if USB_MAX_CONTROLLER_COUNT is incorrectNikhil Badola2015-06-071-1/+1
| | | | | | | | | | | | | | Return if USB_MAX_CONTROLLER_COUNT hence the index of the controller to be initialised is incorrect Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
* | ahci: extend data io wait to 10sMark Langsdorf2015-06-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | The AHCI driver currently waits 5s before timing out when sending a data command to a drive. Some drives take upwards of 8s to respond to the initial data command while they're spinning up. Increase the data io timeout to 10s so that those drives can be found on initial scsi scan. Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Andre Przywara <osp@andrep.de>
* | ahci: support LBA48 data reads for 2+TB drivesMark Langsdorf2015-06-121-9/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable full 48-bit LBA48 data reads by passing the upper word of the LBA block pointer in bytes 9 and 10 of the FIS. This allows uboot to load data from any arbitrary sector on a drive with 2 or more TB of available data connected to an AHCI controller. Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com> Signed-off-by: Andre Przywara <osp@andrep.de> [trini: Make use of CONFIG_SYS_64BIT_LBA in a few places to drop warnings on platforms that don't enable that feature ] Signed-off-by: Tom Rini <trini@konsulko.com>
* | dm: usb: tegra: Drop legacy USB codeSimon Glass2015-06-101-150/+0
| | | | | | | | | | | | Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: Move CONFIG_SANDBOX_SERIAL to KconfigSimon Glass2015-06-102-2/+23
| | | | | | | | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Remove SPL undefine of CONFIG_OF_CONTROLSimon Glass2015-06-101-0/+2
| | | | | | | | | | | | | | Allow SPL to be built with this option so that we can support device tree control. Disable the simple bus for now in SPL. It may be needed later. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: serial: Don't support CONFIG_CONS_INDEX with device treeSimon Glass2015-06-101-32/+37
| | | | | | | | | | | | | | | | This feature should be deprecated for new boards, and significantly adds to SPL code size. Drop it. Instead, we can use stdout-path in the /chosen node. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver modelSimon Glass2015-06-101-0/+4
| | | | | | | | | | | | | | | | This option is used by some boards, so support it with driver model. This is really ugly - we should rewrite this driver once all users are moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Remove typedefs from bmp_layout.hSimon Glass2015-06-103-9/+9
| | | | | | | | | | | | | | | | | | We try to avoid typedefs and these ones are easy enough to remove. Before changing this header in the next patch, remove the typedefs. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | dm: usb: Implement usb_detect_change() for driver modelSimon Glass2015-06-101-0/+43
| | | | | | | | | | | | Support this function with driver model also (CONFIG_DM_USB). Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: i2c: Add compatibility functions for dm_i2c_reg_read/write()Simon Glass2015-06-101-0/+21
| | | | | | | | | | | | | | | | Add the legacy i2c_reg_read/write() functions to the compatibility layer so that they can be used when CONFIG_DM_I2C_COMPAT is defined. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* | tegra: lcd: Tidy up clock initSimon Glass2015-06-091-3/+1
| | | | | | | | | | | | | | Use the correct function for clock init. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: spi: Support slow SPI ratesSimon Glass2015-06-091-3/+15
| | | | | | | | | | | | | | | | | | Use the oscillator as the source clock when we cannot achieve a low-enough speed with the peripheral clock. This happens when we request 3MHz on a SPI clock, for example. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | tegra: spi: Drop the claim_bus() method to correct delaysSimon Glass2015-06-091-17/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the driver does not properly honour the requested SPI CS deactivation delay since the SPI bus is changed in the claim_bus() method. Everything the claim_bus() method does can be done when the device is probed (setting the speed and mode) and at the start of a new transfer (where the fifo_status is already cleared). So drop this method. Also, until the delay is complete, we should not touch the bus, so make sure that spi_cs_activate() is called before other things are done in the xfer() method. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-06-086-1/+189
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| * usb: ehci-vf: Add weak function for board specific initialisationSanchayan Maity2015-06-081-0/+8
| | | | | | | | | | | | | | Add a weak function board_ehci_hcd_init which can be used by the board file for board specific initialisation. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
| * dm: gpio: vf610: Add GPIO driver supportBhuvanchandra DV2015-06-083-0/+177
| | | | | | | | | | | | Add GPIO driver support to Freescale VF610 Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
| * dm: gpio: uclass: Add flag to control sequence numberingBhuvanchandra DV2015-06-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Like SPI and I2C few GPIO controllers also have multiple chip instances. This patch adds the flag 'DM_UC_FLAG_SEQ_ALIAS' in gpio_uclass driver to control device sequence numbering. By defalut the dev->r_seq for gpio_uclass will alwalys returns -1, which leads the gpio driver probe failure when using the driver with device trees. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
| * pci: imx: display message if no pcie linkTim Harvey2015-05-281-1/+3
| | | | | | | | | | | | | | If CONFIG_PCI_SCAN_SHOW enabled then lets print a message of no link was detected. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | Merge git://git.denx.de/u-boot-sunxiTom Rini2015-06-062-1/+4
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| * | sunxi: gpio: Add "allwinner,sun8i-a33-pinctrl"Hans de Goede2015-06-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add "allwinner,sun8i-a33-pinctrl", this is used by the latest upstream linux sunxi dts files. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: mmc: Enable pull-up on card-detect gpio pinHans de Goede2015-06-041-1/+3
| | | | | | | | | | | | | | | | | | | | | On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2015-06-051-0/+1
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| * | | dm: pci: Allow PCI bus numbering aliasesSimon Glass2015-06-041-0/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 9cc36a2 'dm: core: Add a flag to control sequence numbering' changed the default uclass behaviour to not support bus numbering. This is incorrect for PCI and that commit should have enabled the flag for PCI. Enable it so that PCI buses can be found and the 'pci' command works again. Also add a test for this. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-041-28/+229
| | | | | | | | | | | | | | | | | | | | | | | | | | | Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
* | | pci: Do not skip legacy IDE device configurationBin Meng2015-06-041-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The legacy IDE device has a BAR4 (Bus Master Interface BAR) which needs to be configured. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | pci: Allow debug message output in pci_auto.cBin Meng2015-06-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove the '#undef DEBUG' in pci_auto.c so that we can enable debug message output via '-DDEBUG'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: Move FRAMEBUFFER_SET_VESA_MODE etc to video KconfigBin Meng2015-06-041-0/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_FRAMEBUFFER_SET_VESA_MODE and CONFIG_FRAMEBUFFER_VESA_MODE are not x86-specific, so move them to drivers/video/Kconfig and make them depend on VIDEO_VESA driver. Some cosmetic fixes are applied to the Kconfig help text as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | video: Kconfig: Make VESA driver avaiable for non-x86 boardsBin Meng2015-06-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | There is no reason to prevent CONFIG_VIDEO_VESA driver working on non-x86 boards, so remove such limitation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | pci: Move pci_hose_phys_to_bus() to pci_common.cBin Meng2015-06-042-70/+66
|/ / | | | | | | | | | | | | | | pci_hose_phys_to_bus() is needed by several drivers. Move it to pci_common.c to avoid a broken build when CONFIG_DM_PCI is on. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2015-05-308-30/+20
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| * | ARM: UniPhier: update the vendor name of UniPhier in KconfigMasahiro Yamada2015-05-313-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | The business for UniPhier Soc family has been transferred from Panasonic Corporation to Socionext Inc. Update the SoC select menu in Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | ARM: UniPhier: replace <asm/io.h> with <linux/io.h>Masahiro Yamada2015-05-315-19/+10
| | | | | | | | | | | | | | | | | | | | | In the Linux coding style, it is recommended to include <linux/io.h> rather than <asm/io.h>. Follow this trend. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-05-302-0/+274
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| * | | sunxi/nand: Add support to the SPL for loading u-boot from internal NAND memoryDaniel Kochmański2015-05-292-0/+274
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support to the sunxi SPL to load u-boot from the internal NAND. Note this only adds support to access the boot partitions to load u-boot, full NAND support to load the kernel, etc. from the nand data partition will come later. Signed-off-by: Roy Spliet <r.spliet@ultimaker.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge git://git.denx.de/u-boot-usbTom Rini2015-05-294-20/+120
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| * | | usb: dwc2: Add support for v3 snpsid valuePeter Griffin2015-05-292-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has been tested to the extent that I can enumerate a asix usb networking adapter and boot a kernel over usb on the 96boards hikey u-boot port I'm currently doing. Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
| * | | ci_udc: Update the ci_udc driver to support bulk transfersSiva Durga Prasad Paladugu2015-05-292-19/+117
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Update the ci_udc driver to support bulk transfer and also added capability of having multiple dtds if requested data is more than 16K. These changes are tested for both the DFU and lthor. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
* | | cosmetic: change Author/MAINTAINER Name from Petermaier to SchmelzerHannes Schmelzer2015-05-283-3/+3
|/ / | | | | | | | | | | | | | | | | | | | | Since i've been married, i also have a new surname. Mr. Petermaier moved to Mr. Schmelzer. In this patch i update all files in which my (old) name is present. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* | fsl/sata: Replace sprintf() with snprintf()Tang Yuantian2015-05-281-1/+1
| | | | | | | | | | | | | | | | Function 'sprintf' does not check buffer boundaries but outputs to the buffer of fixed size which could potentially cause buffer overflow. Use a safer function to replace it. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
* | gpio: stm32: add stm32f1 supportMatt Porter2015-05-281-1/+109
| | | | | | | | | | | | Add support for the STM32F1 family to the STM32 gpio driver. Signed-off-by: Matt Porter <mporter@konsulko.com>
* | pci: display header for bus scanTim Harvey2015-05-271-0/+4
| | | | | | | | | | | | | | If we are displaying detected PCI devices (CONFIG_PCI_SCAN_SHOW) display a 'PCI:' header prior to scan. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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