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* blackfin: include <linux/compiler.h> rather than define __iomemMasahiro Yamada2014-12-081-1/+0
| | | | | | | | The macro __iomem is defined in include/linux/compiler.h. Let's include it rather than double __iomem defines. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.adi@gmail.com>
* Replace <compiler.h> with <linux/compiler.h>Masahiro Yamada2014-12-084-4/+4
| | | | | | Including <linux/compiler.h> is enough for general use. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* serial: pl01x: avoid pl01x type check two timesVikas Manocha2014-12-081-9/+6
| | | | | Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* serial: pl01x: disable as per type of pl01xVikas Manocha2014-12-081-3/+4
| | | | | | | | pl010 & pl011 have different control register offsets, setting it as per the pl01x type. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* serial: pl01x: move all line control at same placeVikas Manocha2014-12-081-23/+21
| | | | | | | | Receive line control uses same setting as transmit line control, also one lcrh write is effective for both baud rate & receive line control internal update. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* serial: pl01x: fix pl011 baud rate configurationVikas Manocha2014-12-081-0/+8
| | | | | | | | | | UART_IBRD, UART_FBRD, and UART_LCR_H form a single 30-bit wide register which is updated on a single write strobe generated by a UART_LCR_H write. So, to internally update the content of UART_IBRD or UART_FBRD, a write to UART_LCR_H must always be performed at the end. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* serial: pl01x: pass pl01x_type to set baudrateVikas Manocha2014-12-081-1/+1
| | | | | | | | Although we were checking the pl01x type, seems like PL010 type was being passed by mistake. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-fdtTom Rini2014-12-011-1/+1
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| * fdt: remove fdtdec_get_alias_node() functionMasahiro Yamada2014-11-271-1/+1
| | | | | | | | | | | | | | | | | | | | The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-x86Tom Rini2014-12-0122-213/+665
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| * | bios_emulator: Always print errors when opcode decode failsSimon Glass2014-11-253-18/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a rare event and should not happen. When it does it is confusing to work out why. At least we should print a message. Adjust the emulator to always print decode errors to the console. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | bios_emulator: Add an option to enable debuggingSimon Glass2014-11-259-54/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present there are DEBUG options spread around the place. If you enable one and not another you can end up with an emulator that does not work, since each file can have a different view of what the registers look like. To fix this, create a global CONFIG_X86EMU_DEBUG option that keeps everything consistent. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | bios_emulator: Allow a custom interrupt handler to be installedSimon Glass2014-11-252-0/+6
| | | | | | | | | | | | | | | | | | | | | Sometime we want to provide an interrupt handler for the ROM, Add a function to allow this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | bios_emulator: Add vesa support and allow ROMs to be passed in as dataSimon Glass2014-11-252-58/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | As well as locating the ROM on the PCI bus, allow the ROM to be supplied to the emulator. Split the init up a little so that callers can supply their own interrupt routines. Also allow a vesa mode to be provided, to be selected once the BIOS run is complete. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | bios_emulator: Allow x86 to use the emulatorSimon Glass2014-11-254-23/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is an implicit assumption that x86 machines want to use raw I/O in the BIOS emulator, but this should be selectable. Add an CONFIG_X86EMU_RAW_IO option to control it instead. Also fix a few bugs which cause warnings on x86 and adjust the Makefile to remove the assumption that only PowerPC uses the emulator. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | x86: video: Add video driver for bare x86 boardsSimon Glass2014-11-252-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | Add a very simple driver which uses vesa to discover the video mode and then provides a frame buffer for use by U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * | pci: Add general support for execution of video ROMsSimon Glass2014-11-252-1/+279
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms don't have native code for dealing with their video hardware. In some cases they use a binary blob to set it up and perform required actions like setting the video mode. This approach is a hangover from the old PC days where a ROM was provided and executed during startup. Even now, these ROMs are supplied as a way to set up video. It avoids the code for every video chip needing to be provided in the boot loader. But it makes the video much less flexible - e.g. it is not possible to do anything else while the video init is happening (including waiting hundreds of milliseconds for display panels to start up). In any case, to deal with this sad state of affairs, provide an API for execution of x86 video ROMs, either natively or through emulation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Introduce a header file for the BIOS emulatorSimon Glass2014-11-252-52/+3
| | | | | | | | | | | | | | | | | | | | | We should have a public header so that users can avoid defining functions themselves. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | pci: Add functions to read and write a BAR addressSimon Glass2014-11-251-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some PCI functions cannot be auto-configured. Add a function to set up a fixed BAR which can be used in these situations. Also add a function to read the current address of a BAR. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | rtc: mc146818: Set up RTC at start of daySimon Glass2014-11-252-5/+40
| | | | | | | | | | | | | | | | | | | | | Provide a function to set up the RTC ready for use. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2014-11-272-9/+48
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| * | | usb: UniPhier: support OF configurationMasahiro Yamada2014-11-281-1/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_OF_CONTROL is defined, search device tree nodes that are compatible with "panasonic,uniphier-ehci" and take the base address from their "reg" property. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Marek Vasut <marex@denx.de>
| * | | serial: UniPhier: support OF configurationMasahiro Yamada2014-11-281-8/+11
| | |/ | |/| | | | | | | | | | | | | | | | This commit implements the ofdata_to_platdata handler for the UniPhier serial driver and adds serial device nodes to the device tree sources. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | mtd: nand: s3c: Unify the register definition and namingMarek Vasut2014-11-261-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge struct s3c2410_nand and struct s3c2440_nand into one unified struct s3c24x0_nand. While at it, fix up and rename the functions to retrieve the NAND base address and fix up the s3c NAND driver to reflect this change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Vladimir Zapolskiy <vz@mleia.com>
* | | mtd/nand/vf610_nfc: Disable subpage writesSanchayan Maity2014-11-261-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch disables subpage writes for vf610_nfc nand driver. This is required, as without this fix, writing unaligned u-boot images with DFU results in a hang. Trying to write unalgined binary images also results in a hang, without disabling subpage writes. Patch has been tested on a Colibri VF61 module. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* | | mtd: denali: set some registers after nand_scan_ident()Masahiro Yamada2014-11-261-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some but not all of implementations of the Denali NAND controller have hardware circuits to detect the device parameters such as page_size, erase_size, etc. Even on those SoCs with such hardware supported, the hardware is known to detect wrong parameters for some nasty (almost buggy) NAND devices. The device parameters detected during nand_scan_ident() are more trustworthy. This commit sets some hardware registers to mtd->pagesize, mtd->oobsize, etc. in the code between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
* | | mtd: denali: use CONFIG_SYS_NAND_SELF_INITMasahiro Yamada2014-11-263-40/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some variants of the Denali NAND controller need some registers set up based on the device information that has been detected during nand_scan_ident(). CONFIG_SYS_NAND_SELF_INIT has to be defined to insert code between nand_scan_ident() and nand_scan_tail(). It is also helpful to reduce the difference between this driver and its Linux counterpart because this driver was ported from Linux. Moreover, doc/README.nand recommends to use CONFIG_SYS_NAND_SELF_INIT. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
* | | nand: reinstate lazy bad block scanningRostislav Lisovy2014-11-261-3/+7
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ff94bc40af3481d47546595ba73c136de6af6929 ("mtd, ubi, ubifs: resync with Linux-3.14") accidentally reverted part of the commit 13f0fd94e3cae6f8a0d9fba5d367e311edc8ebde ("NAND: Scan bad blocks lazily."). Reinstate the change as by commit fb49454b1b6c7c6e238ac3c0b1e302e73eb1a1ea ("nand: reinstate lazy bad block scanning") Signed-off-by: Rostislav Lisovy <lisovy@merica.cz> Acked-by: Heiko Schocher <hs@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2014-11-266-4/+152
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| * | drivers : usb: fsl: Implement usb Erratum A007798 workaroundNikhil Badola2014-11-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large usb writes Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | drivers: usb: fsl: Move USB Errata checking codeNikhil Badola2014-11-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move USB Errata checking code from "arch/powerpc" to architecture independent file "fsl_usb.h" so that errata(s) become independent of the architecture. For each erratum checking function for PPC arch, define a nop function for non PPC arch for successful compilation in either case Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | u_qe: add u_qe_upload_firmware for u_qeZhao Qiang2014-11-192-2/+131
| | | | | | | | | | | | | | | Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | qe: add u-qe support to arm boardZhao Qiang2014-11-195-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | ls1021 is arm-core and support qe which is u-qe. add u-qe init for arm board. Signed-off-by: Zhao Qiang <B45475@freescale.com> [York Sun: Fix compiling error caused by u_qe_init()] Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-11-262-5/+13
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/mmc/fsl_esdhc.c Signed-off-by: Tom Rini <trini@ti.com>
| * | | mmc: fsl_esdhc: fix f_max retrieval during initMarkus Niebel2014-11-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for multi instance API we use struct fsl_esdhc_cfg to pass the clock rate. Do not set f_max from global data, since this is wrong for multi instance case. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | net/fm: add 2.5G SGMII supportShengzhou Liu2014-11-191-4/+12
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | As auto-negotiation is not supported for 2.5G SGMII, we need to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate SGMII-1G and SGMII-2.5G with different setting for auto-negotiation. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | Merge branch 'master' of http://git.denx.de/u-boot-samsungTom Rini2014-11-262-11/+96
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| * | | arm: odroid: usb: add support for usb host including ethernetSuriyan Ramasami2014-11-171-8/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds support for enabling the USB host features of the board. This includes the USB3503A hub and the SMC LAN9730 ethernet controller as well. Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | | arm: odroid: pmic77686: allow buck voltage settingsSuriyan Ramasami2014-11-171-3/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow to set the buck voltage for the max77686. This will be used to reset the SMC LAN9730 ethernet on the odroids. Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | | sunxi: video: Add simplefb supportLuc Verhaegen2014-11-251-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add simplefb support, note this depends on the kernel having support for the clocks property which has recently been added to the simplefb devicetree binding. Signed-off-by: Luc Verhaegen <libv@skynet.be> [hdegoede@redhat.com: Use pre-populated simplefb node under /chosen as disussed on the devicetree list] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>.
* | | | sunxi: video: Add sun6i supportHans de Goede2014-11-251-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Besided needing the usual sun6i specific ahb1_reset bits poking, it turns out that sun6i also needs the drc to be taken out of reset and clocked even though it is in pass-through mode. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* | | | sunxi: video: Add cfb console driver for sunxiLuc Verhaegen2014-11-252-0/+381
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a fixed mode hdmi driver for the sunxi platform. The fixed mode is a relatively safe 1024x768, more complete EDID handling is currently not provided. Only HDMI is supported today. This code is enabled when HPD detects an attached monitor. Current config is such that 8MB is shaved off at the top of the RAM. This avoids several memory handling issues, most significant is the fact that on linux on ARM you are not allowed to remap known RAM as IO. A clued in display driver will be able to recycle this reserved RAM in future though. cfbconsole was chosen as it provides the most important functionality: a working u-boot console, allowing for the debugging of certain issues without the need for a UART. Signed-off-by: Luc Verhaegen <libv@skynet.be> [hdegoede@redhat.com: Major cleanups and some small bugfixes] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-2412-0/+276
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| * | | sata: implement reset_sata for dwc_ahsataNikita Kiryanov2014-11-247-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add reset_sata() to the sata driver interface and implement it for dwc_ahsata. This function cleans up after sata_init(), and therefore accepts a device number like sata_init() does. A dummy implementation is provided for the rest of the drivers. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
| * | | DM: thermal: Add imx thermal DM driverYe.Li2014-11-214-0/+217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new thermal uclass for thermal sensor and implement the imx thermal driver basing on this uclass. Signed-off-by: Ye.Li <B37916@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | | mmc: fsl_esdhc: Update esdhc driver for iMX6SXYe.Li2014-11-201-0/+8
| | |/ | |/| | | | | | | | | | | | | | | | | | | The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0 on iMX6SX. So the fsl_esdhc driver must update to set the register, otherwise no state can be detected. Signed-off-by: Ye.Li <B37916@freescale.com>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2014-11-2412-286/+625
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial-uclass.c Signed-off-by: Tom Rini <trini@ti.com>
| * | | dm: core: remove unnecessary return condition in uclass lookupMasahiro Yamada2014-11-221-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These conditions never happen. - There is no real uclass with UCLASS_INVALID id. - uclass never becomes NULL because ll_entry_start() always returns a valid pointer. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: remove unnecessary return condition in driver lookupMasahiro Yamada2014-11-221-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The variable "drv" never becomes NULL because ll_entry_start() always returns a valid pointer even if there are no entries. The case "n_ents == 0" is covered by the following "for" loop. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | dm: core: remove meaningless if conditionalMasahiro Yamada2014-11-221-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the variable "ret" is equal to "-ENOENT", it is trapped at [1] and never reaches [2]. At [3], the condition "ret != -ENOENT" is always true. if (ret == -ENOENT) { <------------------ [1] continue; } else if (ret == -ENODEV) { dm_dbg("Device '%s' has no compatible string\n", name); break; } else if (ret) { <------------------ [2] dm_warn("Device tree error at offset %d\n", offset); if (!result || ret != -ENOENT) <------------------ [3] result = ret; break; } Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
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