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* dm: i2c: Allow muxes to be enabled for SPL separatelySimon Glass2016-01-213-3/+12
| | | | | | | Since I2C muxes are seldom needed in SPL, and the code for this increases the size somewhat, add a separate option to enable I2C muxes for SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Disable the Chrome OS EC in SPLSimon Glass2016-01-211-0/+2
| | | | | | | This is not used in SPL so don't allow it to be built there, even if I2C is enabled in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: pinctrl: Add a full pinctrl driverSimon Glass2016-01-211-1/+229
| | | | | | | We can make use of the device tree to configure pinctrl settings. Add this support for the driver so we can use it in U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: mmc: Update the driver to use the new clock IDSimon Glass2016-01-211-1/+1
| | | | | | We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Avoid setting the pinctrl twiceSimon Glass2016-01-211-3/+6
| | | | | | | | If full pinctrl is enabled we don't need to manually set the pinctrl in the driver. It will happen automatically. Adjust the code to suit - we will still use manual mode in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Update the driver to use the new clock IDSimon Glass2016-01-211-15/+17
| | | | | | We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: i2c: Update the driver to use the new clock IDSimon Glass2016-01-211-16/+22
| | | | | | We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clock: Add a function to find a clock by IDSimon Glass2016-01-211-2/+22
| | | | | | | | The current approach of using uclass_get_device() is error-prone. Another clock (for example a fixed-clock) may cause it to break. Add a function that does a proper search. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clk: Add a function to get a peripheral clock rateSimon Glass2016-01-211-0/+37
| | | | | | | It is useful to be able to read the rate of a peripheral clock. Add a handler for that. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clock: Rename the general clock variable to gclk_rateSimon Glass2016-01-211-12/+12
| | | | | | The current name is confusing and a bit verbose. Rename it. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Use a separate clock ID for clocksSimon Glass2016-01-213-44/+48
| | | | | | | | | | At present we use the same peripheral ID for clocks and pinctrl. While this works it is probably better to use the device tree clock binding ID for clocks. We can use the clk_get_by_index() function to find this. Update the clock drivers and the code that uses them. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: mmc: Use a pwrseq device if availableSimon Glass2016-01-211-0/+47
| | | | | | | Use the pwrseq uclass to find a suitable power sequence for the MMC device. If this is enabled in the device tree, we will pick it up automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Convert the PMU IOMUX registers into an arraySimon Glass2016-01-211-2/+2
| | | | | | | | | This is easier to deal with when using generic code since it allows us to use a register index instead of naming each register. Adjust it, adding an enum to improve readability. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add a power sequencing uclassSimon Glass2016-01-213-0/+43
| | | | | | | | Some devices need special sequences to be used when starting up. Add a uclass for this. Drivers can be added to provide specific features as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* power: Add support for RK808 regulatorsSimon Glass2016-01-213-0/+311
| | | | | | | Add regulator support for the RK808 PMIC. It integrated 4 BUCKs and 8 LDOs all of which are supported by this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* power: Add base support for the RK808 PMICSimon Glass2016-01-213-0/+106
| | | | | | | | | | This Rockchip PMIC provides features suitable for battery-powered applications. It is commonly used with Rockchip SoCs. Add a driver which provides register access. The regulator driver will use this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pinctrl: Add a function to parse PIN_CONFIG flagsSimon Glass2016-01-211-0/+12
| | | | | | | | Add a function which produces a flags word from a few common PIN_CONFIG settings. This is useful for simple pinctrl drivers that don't need to worry about drive strength, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Don't set pinctrl for pinctrl devicesSimon Glass2016-01-211-2/+4
| | | | | | | | | | | | | | There is sort-of race condition when a pinctrl device is probed. The pinctrl function is called which may end up using the same device as is being probed. This results in operations being used before the device is actually probed. For now, disallow pinctrl operations on pinctrl devices while probing. An alternative solution would be to move the operation to later in the device_probe() function (for pinctrl devices only) but this needs more thought. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: rk3036: Bind GPIO banksJeffy Chen2016-01-211-0/+8
| | | | | | | | Call dm_scan_fdt_node() in rk3036 pinctrl uclass binding. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* dm: clk: Add support for decoding clocks from the device treeSimon Glass2016-01-211-0/+28
| | | | | | | | | Add a method which can locate a clock for a device, given its index. This uses the normal device tree bindings to return the clock device and the first argument which is normally used as a peripheral ID in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* clk: add fixed rate clock driverMasahiro Yamada2016-01-212-1/+58
| | | | | | | | | | | | This commit intends to implement "fixed-clock" as in Linux. (drivers/clk/clk-fixed-rate.c in Linux) If you need a very simple clock to just provide fixed clock rate like a crystal oscillator, you do not have to write a new driver. This driver can support it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-01-2126-106/+2016
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| * dm: video: test: Add tests for the video uclassSimon Glass2016-01-201-9/+0
| | | | | | | | | | | | | | | | | | Add tests that check that the video console is working correcty. Also check that text output produces the expected result. Test coverage includes character output, wrapping and scrolling. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: sandbox: Convert sandbox to use driver model for videoSimon Glass2016-01-202-50/+50
| | | | | | | | | | | | | | | | Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * sandbox: Move CONFIG_VIDEO_SANDBOX_SDL to KconfigSimon Glass2016-01-201-0/+9
| | | | | | | | | | | | | | | | Move this option to Kconfig. This is quite simple as only sandbox uses the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: Implement the bmp command for driver modelSimon Glass2016-01-202-0/+354
| | | | | | | | | | | | | | | | | | This command can use the bitmap display code in the uclass. This is similar to the code in lcd.c and cfb_console.c. These other copies will go away when all boards are converted to use driver model for video. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: Add a driver for a rotated text consoleSimon Glass2016-01-203-0/+450
| | | | | | | | | | | | | | | | | | Sometimes the console must be rotated. Add a driver which supports rotating the text clockwise to 90, 180 and 270 degrees. This can support devices where the display is rotated for mechanical reasons. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: Add a 'normal' text console driverSimon Glass2016-01-202-1/+142
| | | | | | | | | | | | | | | | | | | | Most of the time we don't need to rotate the display so a simple font blitting feature is enough for our purposes. Add a simple driver which supports this function. It provides text output on the console using the standard 8x16-pixel font. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: Add a uclass for the text consoleSimon Glass2016-01-203-1/+261
| | | | | | | | | | | | | | | | | | | | | | | | The existing LCD/video interface suffers from conflating the bitmap display with text output on that display. As a result the implementation is more complex than it needs to me. We can support multiple text console drivers. Create a separate uclass to support this, with its own API. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: Add a video uclassSimon Glass2016-01-203-0/+269
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has separate code for LCDs and 'video' devices. Both now use a very similar API thanks to earlier work by Nikita Kiryanov. With the driver- model conversion we should unify these into a single uclass. Unfortunately there are different features supported by each. This implementation provides for a common set of features which should serve most purposes. The intent is to support: - bitmap devices with 8, 16 and 32 bits per pixel - text console wih white on black or vice versa - rotated text console - bitmap display (BMP format) More can be added as additional boards are ported over to use driver model for video. The name 'video' is chosen for the uclass since it is more generic than LCD. Another option would be 'display' but that would introduce a third concept to U-Boot which seems like the wrong approach. The existing LCD and video init functions are not needed now, so this uclass makes no attempt to implement them. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * serial: lpuart: Add driver model serial supportBin Meng2016-01-201-0/+167
| | | | | | | | | | | | | | | | This adds driver model support to lpuart serial driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Tested-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
| * serial: lpuart: Prepare the driver for DM conversionBin Meng2016-01-201-22/+66
| | | | | | | | | | | | | | | | | | Create internal routines which take lpuart's register base as a parameter, in preparation for driver model conversion. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * serial: lpuart: Call local version of setbrg and putc directlyBin Meng2016-01-201-4/+4
| | | | | | | | | | | | | | | | | | There is no need to go through serial driver subsystem, instead call the driver's setbrg and putc routines directly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * serial: lpuart: Fix several cosmetic issuesBin Meng2016-01-201-20/+15
| | | | | | | | | | | | | | | | | | | | | | Clean up the driver codes a little bit, by: - Use tab instead of space in the macro defines - Use single line comment whenever possible - Fix insertion of blank lines Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * serial: lpuart: Move CONFIG_FSL_LPUART to KconfigBin Meng2016-01-201-0/+6
| | | | | | | | | | | | | | | | | | | | | | LPUART is seen on Freescale VF610 and QorIQ Layerscape devices. Create a Kconfig option and move it to defconfig for all boards that have this serial driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clk: add API to enable clockMasahiro Yamada2016-01-201-0/+10
| | | | | | | | | | | | | | | | The most basic thing for clock is to enable it, but it is missing in this uclass. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clk: add static qualifier to local functionsMasahiro Yamada2016-01-203-4/+5
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clk: move Kconfig options into sub-menuMasahiro Yamada2016-01-201-0/+4
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * timer: sandbox: work without device treeStephen Warren2016-01-201-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A default invocation of sandbox U-Boot apparently uses no device tree, which means that no timer is registers, which in turn means that the sleep shell command hangs. Fix the sandbox timer code to register a device when there's no DT, just like e.g. the sandbox reset driver does. When there's no DT, the DM uclass can't initialize clock_rate from DT, so set a default value in the timer code instead. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: timer: refuse timers with zero clock_rateStephen Warren2016-01-201-0/+11
| | | | | | | | | | | | | | | | | | If a timer has a zero clock_rate, get_tbclk() will return zero for it, which will cause tick_to_time() to perform a division-by-zero, which will crash U-Boot. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: core: Call uclass post_bind() after the driver's bind() methodSimon Glass2016-01-202-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the uclass's post_bind() method is called before the driver's bind() method. This means that the uclass cannot use any of the information set up by the driver. Move it later in the sequence to permit this. This is an ordering change which is always fairly major in nature. The main impact is that devices which have children will not see them appear in their bind() method. From what I can see, existing drivers do not look at their children in the bind() method, so this should be safe. Conceptually this change seems to result in a 'more correct' ordering, since the uclass (which is broader than the device) gets the last word. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * pinctrl: Avoid binding all pinconfig nodes before relocationSimon Glass2016-01-201-0/+4
| | | | | | | | | | | | | | | | This can create a large number of pinctrl devices. It chews up early malloc() memory and takes time. Only bind those which are marked as needed before relocation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Try to honour the sequence orderSimon Glass2016-01-201-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | At present we add driver-model MMC devices in the order we find them. The 'alias' order is not honoured. It is difficult to fix this for the case where we have holes in the sequence. But for the common case where the devices are numbered from 0 without any gaps, we can add the devices to the internal data structures in this order. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: gpio: Allow the uclass to work without printf()Simon Glass2016-01-201-0/+8
| | | | | | | | | | | | | | For SPL we don't really need sprintf() and with tiny-printf this is not available. Allow this to be dropped in SPL when using tiny-printf. Signed-off-by: Simon Glass <sjg@chromium.org>
| * drivers: timer: omap_timer: add timer driver for omap devices based on dmMugunthan V N2016-01-203-0/+115
| | | | | | | | | | | | | | Adding a timer driver for omap devices based on driver model and device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * dm: timer: uclass: Add flag to control sequence numberingMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Like SPI and I2C, timer devices also have multiple chip instances. This patch adds the flag 'DM_UC_FLAG_SEQ_ALIAS' in timer_uclass driver to control device sequence numbering. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: timer: uclass: add timer init in uclass driver to add timer deviceMugunthan V N2016-01-201-0/+44
| | | | | | | | | | | | | | | | | | | | Adding timer init function in timer-uclass driver to create and initialize the timer device on platforms where u-boot,dm-pre-reloc is not used. Since there will be multiple timer devices in the system, adding a tick-timer node in chosen node to know which timer device to be used as tick timer in u-boot. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * dm: core: Provide uclass_find_device_by_phandle() only when neededSimon Glass2016-01-201-0/+4
| | | | | | | | | | | | | | This function cannot be used unless support is enabled for device tree control. Adjust the code to reflect that. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sunxi: Add support for the I2C controller which is part of the PRCMJelle van der Waa2016-01-211-0/+11
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
* | i2c: mvtwsi: Fix mvtwsi not working on sun6i and newer sunxi SoCsHans de Goede2016-01-211-4/+16
|/ | | | | | | | | | | | | | | On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1, rather then a normal r/w bit which is cleared by writing 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 3 checkpatch warnings in drivers/i2c/mvtwsi.c: WARNING: line over 80 characters ERROR: code indent should use tabs where possible WARNING: please, no spaces at the start of a line Signed-off-by: Heiko Schocher <hs@denx.de>
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