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| * | net: e1000: Increase autoneg timeout to 8 secondsStefan Roese2015-08-122-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current 4.5 timeout for the autonegotiation are not enough to complete it on my platform. Using the Intel E1000 PCIe card in the Marvell db-mv784mp-gp eval board. So lets increase the timeout to 8 seconds. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
| * | net: phy: broadcom: Add BCM Cygnus PHYJiandong Zheng2015-08-111-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | Add Ethernet PHY for BCM Cygnus SoC Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: delay only if reset handler is registeredJörg Krause2015-08-111-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | With commit e3a77218a256edbe201112a39beeed8adcabae3f the MII bus is only reset if a reset handler is registered. If there is no reset handler there is no need to wait for a device to come out of the reset. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * | net: phy: fix data type of phy_idJörg Krause2015-08-111-1/+1
| | | | | | | | | | | | | | | | | | phy_id is declared as u32 in create_phy_by_mask and in struct phy_device. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * | qoriq eth.c bugfix: handle received corrupted frames correctlyDaniel Inderbitzin2015-08-111-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The rxbd is not correctly handled in case of a frame physical error (FPE) or frame size error (FSE). The rxbd must be cleared and advanced in case of an error to avoid receive stall. Signed-off-by: Daniel Inderbitzin <daniel.inderbitzin@gmail.com>
| * | net: lpc32xx: add RMII phy mode supportVladimir Zapolskiy2015-08-111-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LPC32xx MAC and clock control configuration requires some minor quirks to deal with a phy connected by RMII. It's worth to mention that the kernel and legacy BSP from NXP sets SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is missing in shared LPC32x0 User Manual UM10326 Rev. 3, July 22, 2011 and in LPC32x0 Draft User Mannual Rev. 00.27, November 20, 2008, also in my tests an SMSC LAN8700 phy device connected over RMII seems to work correctly without touching this bit. Add support of RMII, if CONFIG_RMII is defined, this option is aligned with a number of boards, which already define the same config value. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
| * | net: lpc32xx: improve MAC configuration on reset and initializationVladimir Zapolskiy2015-08-111-18/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change rearranges general MAC configuration and PHY specific configuration of MAC registers (duplex mode and speed), before this change set bits related to PHY configuration in MAC2 and COMMAND registers are rewritten by the following writing to the registers. Without the change auto negotiation on boot quite often is not completed in reasonable time: Waiting for PHY auto negotiation to complete......... TIMEOUT ! Additionally MAC1_SOFT_RESET clear bit is removed since it is done in preceding lpc32xx_eth_initialize() and in lpc32xx_eth_halt(), instead added missing MCFG_RESET_MII_MGMT on device initialization. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| * | net: lpc32xx: connect MAC to phy with CONFIG_PHY_ADDR idVladimir Zapolskiy2015-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lpc32xx_eth_phylib_init() function is capable to connect LPC32XX MAC to some specified phy by phy id, by chance the single user of lpc32xx_eth has CONFIG_PHY_ADDR set to 0, however other boards may have non-zero CONFIG_PHY_ADDR value, fix it. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: lpc32xx: correct command register reset valueVladimir Zapolskiy2015-08-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to LPC32x0 User Manual the following bits in Command register 0x3106_0100 are defined: Bit Symbol 2 - Unused 3 RegReset 4 TxReset 5 RxReset Fix wrong (1-bit shifted right) COMMAND_RESETS value, which sets an unused bit, but neglects RxReset. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: davinci_emac: don't teardown inactive rx channelJeroen Hofstee2015-08-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tearing down an unitialized rx channel causes a pending address hole event to be queued. When booting linux it will report this pending as something like "Address Hole seen by USB_OTG at address 57fff584", since u-boot did not handled this interrupt. Prevent that by not tearing down the rx channel, when not receiving. Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | net: Add support for Marvell 88E1510 PHYClemens Gruber2015-08-111-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the 88E1510 PHY which is very similar to the 88E1518. I also set the INTn output and configured the LEDs. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: Improve 88E151x PHY initializationClemens Gruber2015-08-111-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - The EEE fixup magic should also be enabled for RGMII - Improved comments Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: macb: add gmac multi-queue supportWu, Josh2015-08-112-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refer to linux kernel commit: d8b763e1e79f net/macb: add TX multiqueue support for gem by: Cyrille Pitchen 1. macb driver will check the register to find how many queues support for this chip. 2. Then as we only use queue0 for tx, so we will set up all other queues use a dummy descriptor, which USED bit is set. So those queues are not used. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net/phy: set led for rtl8211f phyShengzhou Liu2015-08-111-0/+8
| | | | | | | | | | | | | | | | | | | | | Initialize LCR rigister to configure green LED for Link, yellow LED for Active. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * | e1000: remove unnecessary clearing of SWSM.SWSM_SMBITim Harvey2015-08-111-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove unnecessary clearing of SWSM.SWSM_SMBI when obtaining the SW semaphore. This was introduced in 951860634fdb557bbb58e0f99215391bc0c29779 while adding i210 support and should be now resolved by releasing the semaphore when no longer needed. Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Marek Vasut <marex@denx.de> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * | Revert "e1000: fix sw fw sync on igb i210/i211"Tim Harvey2015-08-112-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 17da7120249bfdef877f46be5bbcb3cc01212eb9. The i210/i211 do have the SW_FW_SYNC (0x5b5c) register and this is what should be used when acquiring the semaphore. I believe the issue that this patch was trying to resolve is now resolved by properly releasing the semaphore once no longer needed. Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Marek Vasut <marex@denx.de> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * | e1000: releasing semaphore once no longer neededTim Harvey2015-08-111-0/+22
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once the hwsw semaphore is acquired, it must be released when access to the hw is completed. Without this subsequent calls to acquire will timeout obtaining the semaphore. Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Marek Vasut <marex@denx.de> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | dra7xx: Add dra72_evm_defconfig using CONFIG_DMTom Rini2015-08-121-0/+1
| | | | | | | | | | | | | | | | | | | | - Import various DT files for DRA7 / DR72x / dra72-evm from Linux Kernel v4.1 - Add config file for this board, enable DM and DM_GPIO Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | gpio: omap: Drop 'method' parameterTom Rini2015-08-121-48/+59
| | | | | | | | | | | | | | | | | | | | The "method" parameter was part of the original port of the driver from the kernel. At some point this may have been added to allow for future differentiation (as omap1 and omap2 have different GPIO IP blocks, so this wasn't an unreasonable thing to do). At this point however it's just extra overhead, so drop. Signed-off-by: Tom Rini <trini@konsulko.com>
* | mmc: omap_hsmmc: enable 8bit interface for eMMC for AM43xxNikita Kiryanov2015-08-121-2/+2
| | | | | | | | | | | | | | | | | | Enable 8bit interface on HSMMC2 for am43xx to support 8bit eMMC chips. Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | mmc: omap_hsmmc: enable proper CMD(DAT) lines reset procedure for am43xxNikita Kiryanov2015-08-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | The CMD(DAT) lines reset procedure described in the OMAP4(AM335x, OMAP5, DRA7xx) TRMs is also necessary for AM43XX. Enable it in the driver. Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* | spi: omap3_spi: add am43xx support to omap3_spiNikita Kiryanov2015-08-121-1/+1
| | | | | | | | | | | | | | | | | | Add support for AM43XX to the omap3_spi driver. Cc: Jagan Teki <jteki@openedev.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.Peter Griffin2015-08-122-0/+57
| | | | | | | | | | | | | | | | | | This patch adds the glue code for hi6220 SoC which has 2x synopsis dw_mmc controllers. This will be used by the hikey board support in subsequent patches. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.Peter Griffin2015-08-122-0/+134
| | | | | | | | | | | | | | | | | | This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree. Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
* | dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.Peter Griffin2015-08-122-0/+97
| | | | | | | | | | | | | | This patch adds support for the GPIO perif found on hi6220 SoC. Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
* | usb: ohci: enable cache supportWu, Josh2015-08-122-12/+2
| | | | | | | | | | | | | | | | Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* | Correct License and Copyright information on few filesRuchika Gupta2015-08-121-3/+1
| | | | | | | | | | | | | | | | | | gpio.h - Added missing copyright in few files. rsa-mod-exp.h - Corrected copyright in the file. fsl_sec.h - Added missing license in files drivers/crypto/fsl/Makefile - Removed the incomplete GPLv2 license and replaced it with GPLv2+ license Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
* | drivers: hierarchize drivers Kconfig menuMasahiro Yamada2015-08-1211-0/+68
| | | | | | | | | | | | | | | | | | | | | | The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Update to apply again in a few places, drop USB hunk] Signed-off-by: Tom Rini <trini@konsulko.com>
* | dwc2: Add dcache supportAlexander Stein2015-08-121-7/+17
| | | | | | | | | | | | | | | | | | | | | | This adds dcache support for dwc2. The DMA buffers must be DMA aligned and is flushed for outgoing transactions before starting transfer. For ingoing transactions it is invalidated after the transfer has finished. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> [trini: Update to apply again on top of DM patches] Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: bcm283x: Allocate all mailbox buffers cacheline alignedAlexander Stein2015-08-121-2/+2
| | | | | | | | | | | | | | | | | | | | The mailbox buffer is required to be at least 16 bytes aligned, but for cache invalidation and/or flush it needs to be cacheline aligned. Use ALLOC_CACHE_ALIGN_BUFFER for all mailbox buffer allocations. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* | input: twl4030: Keypad scan and inputPaul Kocialkowski2015-08-121-0/+39
| | | | | | | | | | | | | | | | | | | | | | This allows scanning the twl4030 keypad, storing the result in a 64-byte long matrix with the twl4030_keypad_scan function. Detecting a key at a given column and row is made easier with the twl4030_keypad_key function. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
* | input: TWL4030 input support for power button, USB and chargerPaul Kocialkowski2015-08-122-0/+50
| | | | | | | | | | | | | | This adds support for detecting a few inputs exported by the TWL4030. Currently-supported inputs are the power button, USB and charger presence. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | power: twl4030: Power off supportPaul Kocialkowski2015-08-121-0/+60
| | | | | | | | | | | | | | | | | | | | This adds support for powering off (the omap3 SoC) from the twl4030. This is especially useful when the kernel does not actually power off the device using this method but reboots and leaves it up to the bootloader to actually turn the power off. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | nand: lpc32xx: add SLC NAND controller supportVladimir Zapolskiy2015-08-122-0/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change adds support of LPC32xx SLC NAND controller. LPC32xx SoC has two different mutually exclusive NAND controllers to communicate with single and multiple layer chips. This simple driver allows to specify NAND chip timings and defines custom read_buf()/write_buf() operations, because access to 8-bit data register must be 32-bit aligned. Support of hardware ECC calculation is not implemented (data correction is always done by software), since it requires a working DMA engine. The driver can be included to an SPL image. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
* | spl: nand: simple: replace readb() with chip specific read_buf()Vladimir Zapolskiy2015-08-121-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some NAND controllers define custom functions to read data out, respect this in order to correctly support bad block handling in simple SPL NAND framework. NAND controller specific read_buf() is used even to read 1 byte in case of connected 8-bit NAND device, it turns out that read_byte() may become outdated. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Tom Rini <trini@konsulko.com> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | nand, atmel: remove udelay in spl_nand_erase_one()Heiko Schocher2015-08-121-2/+0
| | | | | | | | | | | | | | | | remove unneeded udelay() in this function, as we use the dev_ready pin. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* | dm: pmic: max77686: Correct two typos in a commentSimon Glass2015-08-121-2/+2
| | | | | | | | | | | | These were pointed out in review but I missed them. Signed-off-by: Simon Glass <sjg@chromium.org>
* | power: regulator: max77686 correct variable typePeng Fan2015-08-121-8/+8
| | | | | | | | | | | | | | | | | | The return type of pmic_read and pmic_write is signed int, so correct variable 'ret' from type unsigned int to int. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com>
* | power: regulator: add pfuze100 supportPeng Fan2015-08-123-0/+577
| | | | | | | | | | | | | | | | | | | | | | | | | | 1. Add new regulator driver pfuze100. * Introduce struct pfuze100_regulator_desc for maintaining info for one regulator. 2. Add new Kconfig entry DM_REGULATOR_PFUZE100 for pfuze100. 3. This driver intends to support PF100, PF200 and PF3000. 4. Add related macro definition in pfuze header file. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
* | power: pmic: pfuze100 support driver modelPeng Fan2015-08-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | 1. Support driver model for pfuze100. 2. Introduce a new Kconfig entry DM_PMIC_PFUZE100 for pfuze100 3. This driver intends to support PF100, PF200 and PF3000, so add the device id into the udevice_id array. 4. Rename PMIC_NUM_OF_REGS macro to PFUZE100_NUM_OF_REGS. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | power: regulator use node name when no regulator-namePeng Fan2015-08-121-1/+3
|/ | | | | | | | | If there is no property named 'regulator-name' for regulators, choose node name instead, but not directly return failure value. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-dmTom Rini2015-08-102-3/+28
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| * dm: serial: Add a REQUIRE_SERIAL_CONSOLE option for boards with no serial portHans de Goede2015-08-102-3/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the serial code assumes that there is always at least one serial port (and panics / crashes due to null pointer dereferences when there is none). This makes it impossible to use u-boot on boards where there is no (debug) serial port, because e.g. all uart pins are muxed to another function. This commit adds a CONFIG_REQUIRE_SERIAL_CONSOLE Kconfig option, which defaults to y (preserving existing behavior), which can be set to n on such boards to make them work. This commit only implements this for CONFIG_DM_SERIAL=y configs, as allowing running without a serial port for CONFIG_DM_SERIAL=n configs is non trivial, and is not necessary at this moment. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-08-087-86/+672
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| * sunxi: display: Add composite video out supportHans de Goede2015-08-081-22/+178
| | | | | | | | | | | | | | | | | | | | Add composite video out support. This only gets enabled on the Mele M3 for now, since that is were it was tested. It will be enabled on more boards after testing. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Add support for interlaced modesHans de Goede2015-08-081-13/+22
| | | | | | | | | | | | | | | | Add support for interlaced modes, this is a preparation patch for adding composite out support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Add a few extra register and constant definesHans de Goede2015-08-081-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a few extra sunxi display registers and constant defines. Also rename some existing defines (e.g. dropping _GCTRL) and make some more generic (e.g. dropping the 2x scaling from SUNXI_LCDC_TCON1_TIMING_V_TOTAL). This is a preparation patch for adding composite video out support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Correct clk_delay calculations for lcd displaysHans de Goede2015-08-081-4/+7
| | | | | | | | | | | | | | We should only subtract 2 from the vblank time when using tcon1. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Replace #ifdef-ery with helper functionsHans de Goede2015-08-081-34/+56
| | | | | | | | | | | | | | | | | | | | | | | | All the #ifdef-ery in selecting the default and fallback monitor type is becoming unyielding and makes the code hard to read, replace it with a few helper functions. This will also be useful with the upcoming CHIP board which has display adapter daughterboards which should be runtime detectable. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: usb-phy: Never power off the usb portsHans de Goede2015-08-083-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB devices are not really designed to get the power bounced off and on at them. Esp. USB powered harddisks do not like this. Currently we power off the USB ports both on a "usb reset" and when booting the kernel, causing the usb-power to bounce off and then back on again. This patch removes the powering off calls, fixing the undesirable power bouncing. Note this requires some special handling for the OTG port: 1) We must skip the external vbus check if we've already enabled our own vbus to avoid false positives 2) If on an usb reset we no longer detect that the id-pin is grounded, turn off vbus as that means an external vbus may be present now Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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