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* cros_ec: Remove the old tunnel codeSimon Glass2015-08-051-267/+1
| | | | | | This is not needed with driver mode. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
* power: Remove old TPS65090 driversSimon Glass2015-08-053-530/+0
| | | | | | | Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Check a GPIO is valid before using itSimon Glass2015-08-051-1/+5
| | | | | | | | | Since a gpio_desc is allowed to be invalid we should return an error indicating that the operation cannot be completed. This can happen if the GPIO is optional - e.g. some devices may have a reset line and some may not. Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: video: Correct debug outputSimon Glass2015-08-052-2/+2
| | | | | | | | | We should not print a message from the driver when the display is set up. This is normal behaviour. Change this message to use debug(). Also remove the double newline on another debug message. Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: Correct return value in exynos_mmc_init()Simon Glass2015-08-051-1/+1
| | | | | | This function should return 0 on success, not 1. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: spi: Convert the timeout to debug()Simon Glass2015-08-051-3/+3
| | | | | | | | | | | Since the timeout is reported through normal channels, and is sometimes expected (e.g. if the bus is being probed for a non-existent device), don't display the message in the driver. In general, drivers should not write to the console as this limits their usefulness in error conditions. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: video: Add support for the NXP PTN3460 bridgeSimon Glass2015-08-053-0/+48
| | | | | | | | | This chip provides an eDP to LVDS bridge which is useful for SoCs that don't support LVDS displays (or it would waste scarce pins). There is no setup required by this chip, other than to adjust power-down and reset pins, and those are managed by the uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: video: Add support for the Parade PS8622/625 bridgeSimon Glass2015-08-053-0/+145
| | | | | | | | This chip provides an eDP to LVDS bridge which is useful for SoCs that don't support LVDS displays (or it would waste scarce pins). The setup is included in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Work around lack of pinctrlSimon Glass2015-08-051-10/+18
| | | | | | | | | | We haven't quite got pinctrl ready to apply to mainline. We don't want to GPIO pull-up/down support to the driver model GPIO layer either. So work around this for now. We can address this when pinctrl is complete. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: video: Add support for video bridgesSimon Glass2015-08-055-0/+130
| | | | | | | | | A video bridge typically converts video from one format to another, e.g. DisplayPort to LVDS. Add driver model support for these with a simple interface to control activation and backlight. The uclass supports GPIO control of power and reset lines. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: power: Don't return an error when regulators are not autosetSimon Glass2015-08-051-1/+3
| | | | | | | | | Not all regulators can be set up automatically. Adjust the code so that regulators_enable_boot_on() will return success when some are skipped. Only genuine errors are reported. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* dm: pmic: max77686: Support all BUCK regulatorsSimon Glass2015-08-051-8/+10
| | | | | | | Add support for all BUCK regulators, now that the correct register is accessed for each. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: power: max77686: Correct BUCK register accessSimon Glass2015-08-051-3/+7
| | | | | | | | Some regulators use the wrong voltage register and thus it is not possible to control them. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* dm: pmic: Correct the pmic_reg_write() implementationSimon Glass2015-08-051-1/+1
| | | | | | | This should write the register, not read it. Fix this bug. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* dm: pmic: max77686: Correct a few nitsSimon Glass2015-08-051-3/+3
| | | | | | | | The driver name should not have a space in it. Also the regulator names should match the case of the device tree. Fix these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* dm: power: Add support for S5M8767 regulatorsSimon Glass2015-08-053-0/+279
| | | | | | | | | This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The driver supports changing voltage and enabling/disabling each regulator. It supports the standard device tree binding and supports driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* dm: power: Add support for the S5M8767 PMICSimon Glass2015-08-053-0/+106
| | | | | | | | | | This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The driver supports probing and basic register access. It supports the standard device tree binding and supports driver model. A regulator driver can be provided also. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* dm: power: Add support for TPS65090 FETsSimon Glass2015-08-053-0/+149
| | | | | | | | | The TPS65090 has 7 FETs which are modelled as regulators. This allows them to be controlled by drivers easier, accessed through the 'regulator' command and used by other drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* dm: power: Add a new driver for the TPS65090 PMICSimon Glass2015-08-053-0/+104
| | | | | | | | | The existing TPS65090 driver does not support driver model. Add a new one that does. This can be used as a base for a regulator driver also. It uses the standard device tree binding. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* exynos: Enable the debug UART in SPLSimon Glass2015-08-051-0/+2
| | | | | | | | As a debugging aid, allow UART3 to be used as a debug UART in SPL. This is a precursor to proper UART support, which requires a substantial refactor. Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: Add debug UART support for Samsung S5P serialSimon Glass2015-08-052-0/+32
| | | | | | | Add a debug UART implementation for this serial driver. It does not set up pinmux automatically - this must be done before calling debug_uart_init(). Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: serial: Refactor init code for debug UARTSimon Glass2015-08-051-12/+24
| | | | | | | | | The debug UART code needs to perform the same init as the normal UART driver. In preparation for this, move the init code into two functions, one for the basic init and one for setting the baud rate. This will make adding debug UART support easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Support the LDO access method used by springSimon Glass2015-08-054-10/+102
| | | | | | | | | | | | | | | | | | | | | | | Add a driver to support the special LDO access used by spring. This is a custom method in the cros_ec protocol - it does not use an I2C pass-through. There are two implementation choices: 1. Write a special LDO driver which can talk across the EC. Duplicate all the logic from TPS65090 for retrying when the LDO fails to come up. 2. Write a special I2C bus driver which pretends to be a TPS65090 and transfers reads and writes using the LDO message. Either is distasteful. The latter method is chosen since it results in less code duplication and a fairly simple (30-line) implementation of the core logic. The crosec 'ldo' subcommand could be removed (since i2c md/mw will work instead) but is retained as a convenience. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: cros_ec: Convert the I2C tunnel code to use driver modelSimon Glass2015-08-055-9/+145
| | | | | | | | | | | | | | | | | | | The Chrome OS EC supports tunnelling through to an I2C bus on the EC. This currently uses a copy of the I2C command code and a special 'crosec' sub-command. With driver model we can define an I2C bus which tunnels through to the EC, and use the normal 'i2c' command to access it. This simplifies the code and removes some duplication. Add an I2C driver which tunnels through to the EC. Adjust the EC code to support binding child devices so that it can be set up. Adjust the existing I2C xfer function to fit driver model better. For now the old code remains to allow things to still work. It will be removed in a later patch once the new flow is fully enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: i2c: Tidy up the driver model codeSimon Glass2015-08-051-36/+103
| | | | | | | | | | | | | | | | | | The existing driver model implementation uses the old non-driver-model code to operate, but has become impossibly tangled as a result. The actual algorithm is quite simple. Also the normal-speed and high-speed buses are quite different and it doesn't seem that useful to put them in the same driver. Finally, there is a bug which breaks communication with the Maxim sound codec and may cause problems with other device. Rewrite the driver model code for normal-speed operation so that it is easier to understand, and fix the bug. Add a TODO to split the drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* exynos: i2c: Fix code style with ReadWriteByte()Simon Glass2015-08-051-7/+7
| | | | | | | | This function should not use mixed case, and it is simpler to use clrbits_le32() when clearing bits. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: Add a mux for GPIO-based I2C bus arbitrationSimon Glass2015-08-053-0/+157
| | | | | | | | | | | | | | | | | | | | | | | | While I2C supports multi-master buses this is difficult to get right. The implementation on the master side in software is quite complex. Clock-stretching and the arbitrary time that an I2C transaction can take make it difficult to share the bus fairly in the face of high traffic. When one or more masters can be reset independently part-way through a transaction it is hard to know the state of the bus. This driver provides a scheme based on two 'claim' GPIOs, one driven by the AP (Application Processor, meaning the main CPU) and one driven by the EC (Embedded Controller, a small CPU aimed at handling system tasks). With these they can communicate and reliably share the bus. This scheme has minimal overhead and involves very little code. It is used on snow to permit the EC and the AP to share access to the main system PMIC and battery. The scheme can survive reboots by either side without difficulty. This scheme has been tested in the field with millions of devices. Since U-Boot runs on the AP, the terminology used is 'our' claim GPIO, meaning the AP's, and 'their' claim GPIO, meaning the EC's. This terminology is used by the device tree bindings in Linux also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add support for multiplexed I2C busesSimon Glass2015-08-055-0/+216
| | | | | | | | | | | | | | | | | Add a new I2C_MUX uclass. Devices in this class can multiplex between several I2C buses, selecting them one at a time for use by the system. The multiplexing mechanism is left to the driver to decide - it may be controlled by GPIOs, for example. The uclass supports only two methods: select() and deselect(). The current mux state is expected to be stored in the mux itself since it is the only thing that knows how to make things work. The mux can record the current state and then avoid switching unless it is necessary. So select() can be skipped if the mux is already in the correct state. Also deselect() can be made a nop if required. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add a function to transfer messagesSimon Glass2015-08-051-0/+11
| | | | | | | | | | | Sometimes it is useful to be able to transfer a raw I2C message. This happens when the chip address needs to be set manually, or when the data to be sent/received is in another buffer. Add a function to provide access to this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Add a message debug functionSimon Glass2015-08-051-0/+16
| | | | | | | Add a way to dump the contents of an I2C message for debugging purposes. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: core: Support finding a device by phandleSimon Glass2015-08-051-0/+42
| | | | | | | | | It is common for one node to reference another via a phandle. Add support for obtaining an attached device by this method. As an example, a node may have a 'power-supply' property which references a regulator, allowing the driver to turn on its power. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-x86Tom Rini2015-08-0512-33/+223
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| * pci: Remove DEBUG from pci_compat.cBin Meng2015-08-051-1/+0
| | | | | | | | | | | | | | Remove DEBUG in drivers/pci/pci_compat.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Gracefully disable the vesa driver when running from EFISimon Glass2015-08-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | We cannot use this driver when running from EFI as we have no direct hardware access. In fact coreboot uses a different driver which uses tables provided by coreboot. So far it does not seem possible to use a normal video driver when booting from EFI. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * efi: Add a serial driverSimon Glass2015-08-053-0/+167
| | | | | | | | | | | | | | | | | | Add a serial driver which makes use of EFI's console in/out service. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested on Intel Crown Bay and QEMU Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Move CONFIG_X86_SERIAL to KconfigSimon Glass2015-08-051-0/+10
| | | | | | | | | | | | | | Move this config option to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * pci: Indicate prefetchable memory allocate when debuggingSimon Glass2015-08-051-2/+3
| | | | | | | | | | | | | | | | | | | | At present the PCI output displays 'Mem' when it allocates memory for a PCI device, whether it is prefetchable or not. There is a distinction since the memory comes from separate pools. Use 'Prf' instead of 'Mem' when allocating prefetchable memory. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * pci: Add a constant for an invalid interruptSimon Glass2015-08-051-1/+2
| | | | | | | | | | | | | | Rather than using 0xff in the code, add a constant. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * pci: Fix up code for CONFIG_PCI_ENUM_ONLYSimon Glass2015-08-051-1/+3
| | | | | | | | | | | | | | | | This option is not used by any board but appears to still be useful, at least for testing. With recent commits it does not build, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * pci: Use debug() instead of DEBUGF() in pci_auto.cSimon Glass2015-08-051-25/+23
| | | | | | | | | | | | | | | | | | This file does not need its own way of doing debug(). Clean it up to use the new way. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Add some missing global_data declarations in files that use gdSimon Glass2015-08-051-0/+2
| | | | | | | | | | | | | | Some files use global_data but don't declare it. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: serial: Correct logic in serial_find_console_or_panic()Simon Glass2015-08-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | In a final attempt to find a console UART this function uses the first first available serial device. However the check for a valid device is inverted. This code is only executed when there is in fact no serial UART, but at present it can fail to reach the panic_str() call in this case, and start trying to use a non-existent UART. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: core: Check for empty list in uclass_find_device()Simon Glass2015-08-051-0/+2
| | | | | | | | | | | | | | | | This function needs to check the list has entries before traversing it. Fix this bug. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Sanity test on vesa parameters before setting up kernel screen_infoBin Meng2015-08-051-0/+4
| | | | | | | | | | | | | | | | We should not set up kernel screen_info when the vesa parameters are insane, otherwise kernel will panic. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: pci: Allow scan bridge child devices before relocationBin Meng2015-08-051-4/+0
| | | | | | | | | | | | | | | | | | On some platforms pci devices behind bridge need to be probed (eg: a pci uart on recent x86 chipset) before relocation. Remove such limitation so that dm pci can be used before relocation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | net: asix: fix operation without eepromMarcel Ziswiler2015-08-051-6/+34
| | | | | | | | | | | | | | | | | | | | This patch fixes operation of our on-board AX88772B chip without EEPROM but with a ethaddr coming from the regular U-Boot environment. This is a forward port of some remaining parts initially implemented by Antmicro. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Marek Vasut <marex@denx.de>
* | usb: USB storage-specific part ifdef in uclassPaul Kocialkowski2015-08-051-0/+2
| | | | | | | | | | | | | | usb_stor_reset is only defined when USB storage support is enabled, thus the function is not declared when such support is missing. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | musb: sunxi: Force EP0 on re-enableMaxime Ripard2015-08-051-0/+3
| | | | | | | | | | | | | | | | Currently, the second use of a gadget will fail, while the first one works. Forcing the EP0 at every enable fix this issue. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | sunxi: usb: USB_MUSB_SUNXI move to musb-new KconfigPaul Kocialkowski2015-08-051-0/+14
| | | | | | | | | | | | | | | | | | | | | | Now that the musb-new driver has a Kconfig, we can move Kconfig options to enable controllers to it, so that it's easier in e.g. menuconfig. In addition, this allows declaring support for USB_MUSB_HOST/GADGET in defconfigs instead of the USB_MUSB_SUNXI controller, that will get selected automatically when needed. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* | usb: musb-new: Kconfig support for USB_MUSB_HOST and USB_MUSB_GADGETPaul Kocialkowski2015-08-052-0/+16
| | | | | | | | | | | | | | Having MUSB_HOST and MUSB_GADGET in Kconfig allows more flexibility with regard to what Kconfig options to enable, such as USB_STORAGE or USB_KEYBOARD. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
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