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* pinctrl: imx: Support i.MX7DPeng Fan2016-02-213-0/+56
| | | | | | | | | | | Introudce i.MX7 pinctrl driver support. For now only i.MX7D supported. There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr. To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg and conf_reg can begin at 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* pinctrl: imx: Introduce pinctrl driver for i.MX6Peng Fan2016-02-215-0/+350
Introduce pinctrl for i.MX6 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7. 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry. 3. To the pinctrl_ops implementation, only set_state is implemented. To i.MX6/7, the pinctrl dts entry is as following: &iomuxc { pinctrl-names = "default"; pinctrl_csi1: csi1grp { fsl,pins = < MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 >; }; [.....] }; there is no property named function or groups. So pinctrl_generic_set_state can not be used here. 5. This driver is a simple implementation for i.mx iomux controller, only parse the fsl,pins property and write value to registers. 6. With DEBUG enabled, we can see log when "i2c bus 0": " set_state_simple op missing imx_pinctrl_set_state: i2c1grp mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x14c val 0x10 select_input: offset 0x5d8 val 0x1 write config: offset 0x3bc val 0x7f mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f write mux: offset 0x148 val 0x10 select_input: offset 0x5d4 val 0x1 write config: offset 0x3b8 val 0x7f " this means imx6 pinctrl driver works as expected. Signed-off-by: Peng Fan <van.freenix@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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