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* net: pcnet: refactor mapping of virtual addresses to physical onesDaniel Schwierzeck2016-01-161-7/+21
| | | | | | | | | | | | | | | | pci_virt_to_mem() uses virt_to_phys() to get the physical address. But pci_virt_to_mem() is also called with uncached addresses which is wrong according to the documentation of virt_to_phys(). Refactor the PCI_TO_MEM() macro to optionally map an uncached address back to a cached one before calling pci_virt_to_mem(). Currently pcnet works because virt_to_phys() is incorrectly implemented on MIPS. With the upcoming asm header file update for MIPS, the virt_to_phys() implementation will be fixed. Thus this patch is needed to keep pcnet working on MIPS Malta board. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-1423-25/+25
| | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-01-141-98/+132
|\ | | | | | | | | | | | | Conflicts: arch/arm/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
| * net: mvneta: Convert to driver modelStefan Roese2016-01-141-98/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this driver to support driver model. As all MVEBU boards using this driver are converted with this patch, the non-driver-model code can be removed completely. This is also the reason why this patch is quite big and includes a) the driver change and b) the platform change. As its not git-bisect save otherwise. With this conversion, some parameters are now extracted from the DT instread of using the config header defines. The supported properties right now are: PHY-mode ("phy-mode") and PHY-address ("reg"). The base addresses for the ethernet controllers can be removed from the header files as well. Please note that this patch also removes the E1000 network driver from some MVEBU config headers. This is necessary, as with DM_ETH configured and the e1000 driver enabled, the PCI driver also needs to support DM. But the MVEBU PCI(e) driver still needs to get ported to DM. When this is done, the E1000 driver can be enabled again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
* | net: lpc32xx: fix ignored MDIO busy wait status on readVladimir Zapolskiy2016-01-131-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change fixes PHY write operation, which incorrectly waits for released busy state before issuing a write operation, this breaks sequential write/read operation logic, because read operation starts immediately on request and it completes, when busy state is gone. Instead of adding the second preceding busy state check to read function, do busy state release check after issuing a write operation, this method of operation is also recommended by the LPC32xx User's Manual, see MII Mgmt Indicators Register notes: For PHY Write if scan is not used: 1. Write 0 to MCMD 2. Write PHY address and register address to MADR 3. Write data to MWTD 4. Wait for busy bit to be cleared in MIND Reported-by: Alexandre Messier <amessier@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Alexandre Messier <amessier@tycoint.com>
* | block: pass block dev not num to read/write/erase()Stephen Warren2016-01-132-2/+4
| | | | | | | | | | | | | | | | | | | | | | This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-netTom Rini2016-01-133-112/+5
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| * net: e1000: Mark _disable_wr() and _write_status() as __maybe_unusedBin Meng2015-12-211-5/+4
| | | | | | | | | | | | | | | | | | Per the comments, e1000_spi_eeprom_disable_wr() and e1000_spi_eeprom_write_status() have been tested. Remove the #if 0, #endif and mark them as __maybe_unused. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: e1000: Remove CONFIG_MVBC_1GBin Meng2015-12-211-2/+0
| | | | | | | | | | | | | | CONFIG_MVBC_1G is not referenced anywhere, hence remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: e1000: Remove dead codes wrapped by #if 0Bin Meng2015-12-212-105/+1
| | | | | | | | | | | | | | Remove those dead codes wrapped by #if 0 and #endif. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | dm: net: Convert rtl8169 to use DM PCI APISimon Glass2016-01-121-19/+66
| | | | | | | | | | | | | | | | Update this driver to use the proper driver-model PCI API functions. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | dm: pci: Add a dm_ prefix to pci_get_bdf()Simon Glass2016-01-124-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | Most driver model PCI functions have a dm_ prefix. At some point, when the old code is converted to driver model and the old functions are removed, we will drop that prefix. For consistency, we should use the dm_ prefix for all driver model functions. Update pci_get_bdf() accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-081-1/+1
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| * | phy: atheros: Use ar8035_config for AR8031Fabio Estevam2016-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 08ad9b068afb88 (" ar8031: modify the config func of ar8031 to ar8021_config") selected 'ar8021_config' as the configuration function for AR8031. The correct would be to use 'ar8035_config' instead as AR8031/AR8035 have the same programming model and even share the same phy driver in the linux kernel: drivers/net/phy/at803x.c. Tested on a mx6qsabresd and wandboard, which now can work without any PHY setup code in the board files. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: Fix delay in net_retry testJoe Hershberger2016-01-071-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduced in 45b4773 (net/arp: account for ARP delay, avoid duplicate packets on timeout) Check the arp timeout and adjust the timeout start time before the call to eth_recv() so that the sandbox driver has the opportunity to adjust the sandbox timer after the new start time has been recorded. Also, change the adjustment amount by 11 seconds instead of exactly the 10 seconds that the ping timout is expecting since the timeout check is looking for the time elapsed to be greater than but not equal to the specified delay. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
* | net: e1000: use correct helper to do endianness conversionMiao Yan2016-01-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | In struct e1000_rx_desc, field 'length' is declared as uint16_t, so use le16_to_cpu() to do endianness conversion. Also drop conversion on 'status' which is declared as uint8_t. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-031-3/+17
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| * | net: fec_mxc: unregister mdio bus on probe errorMåns Rullgård2016-01-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | If fecmxc_initialize_multi() fails, it frees but does not unregister the mdio bus, causing subsequent uses of the "mii" command to crash. Fix this by adding mdio_unregister() calls where needed. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Eric Nelson <eric@nelint.com>
| * | net: fec_mxc: configure MDIO hold timeMåns Rullgård2016-01-031-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host clock frequency is higher than 100 MHz, the MDIO hold time needs to be increased from its current setting of one cycle in order to meet the specified minium of 10 ns. Writing an appropriate value to the HOLDTIME field of the MII_SPEED register achieves this. Comment copied from Linux kernel. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Eric Nelson <eric@nelint.com>
* | | net: designware: Zap trailing backslashMarek Vasut2015-12-221-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Trailing backslashes are necessary only in macros, not in the actual code, so remove them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* | | net: eth_designware: select PHYLIB in KconfigThomas Chou2015-12-222-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files. This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE are selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OFMarek Vasut2015-12-201-1/+145
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to process the KSZ9021/KSZ9031 OF props if they are present and configure skew registers based on the information from the OF. This code is only enabled if the DM support for ethernet is also enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> V2: - Implement struct ksz90x1_reg_field to describe the skew register fields more accurately. - Fix RXDV/TXEN skew register default value and offset.
* | net: gem: Add driver dependencies to PHYLIBMichal Simek2015-12-182-4/+1
| | | | | | | | | | | | | | Clear driver dependecies via Kconfig. Remove PHYLIB dependency from the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | net: gem: Fix typo in Kconfig entryMichal Simek2015-12-181-1/+1
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: gem: Separate recv and free_pkt functionsMichal Simek2015-12-181-20/+32
| | | | | | | | | | | | | | | | Use core to call net_process_received_packet() instead of call inside the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: gem: Fix return value from recvMichal Simek2015-12-181-1/+1
| | | | | | | | | | | | | | | | recv function should return 0 instead of frame_len not to proceed the same packet again in core. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: gem: Setup default phy address to -1Michal Simek2015-12-181-1/+2
| | | | | | | | | | | | | | Undefined phy address is -1 not 0. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: fm: disables unused FM1-DTSEC1 MAC node in DTSShaohui Xie2015-12-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | We don't disable unused FM1-DTSEC1 MAC node in FMAN v2 since it is used by MDIO. For FMAN v3, MDIO uses dedicated controller, so we can disable unused FM1-DTSEC1 MAC node to avoid being probed in Linux. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> [York Sun: revised commit message] Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8/ls1043a: remove print infoMingkai Hu2015-12-171-8/+1
| | | | | | | | | | | | | | | | Remove verbose message for FMan port. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> [York Sun: Added commit message] Reviewed-by: York Sun <yorksun@freescale.com>
* | driver: net: fsl-mc: remove MC firmware version checkStuart Yoder2015-12-171-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MC version numbers provide no meaningful information about binary interface compatibility, so remove the check which refuses to start the MC unless a specific version is found. Version checking is supposed to be done at the individual object level, and individual drivers are responsible for their own version checking. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Acked-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | qbman_portal.c: Update BUG_ON() call in qbman_swp_mc_submitTom Rini2015-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With gcc-5.x we get a warning about the ambiguity of BUG_ON(!a != b) and becomes BUG_ON((!a) != b). In this case reading of the function leads to us wanting to rewrite this as BUG_ON(a != b). Cc: Prabhakar Kushwaha <prabhakar@freescale.com> Cc: Geoff Thorpe <Geoff.Thorpe@freescale.com> Cc: Haiying Wang <Haiying.Wang@freescale.com> Cc: Roy Pledge <Roy.Pledge@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | net: gem: Enable CTRL+C in wait_for_bitMichal Simek2015-12-071-0/+6
| | | | | | | | | | | | | | Enable to break waiting loop at any time. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: gem: Move gem to KconfigMichal Simek2015-12-071-0/+6
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | net: gem: Read information about interface from DTMichal Simek2015-12-071-8/+12
| | | | | | | | | | | | | | Do not set interface via configs. Read information from DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | net: gem: Move driver to DMMichal Simek2015-12-071-69/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | - Enable DM_ETH by default for Zynq and ZynqMP - Remove board_eth_init code - Change miiphy_read function to return value instead of error code based on DM requirement - Do not enable EMIO DT support by default Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | net: gem: Fix miiphy_read nameMichal Simek2015-12-071-2/+2
| | | | | | | | | | | | | | Sync it with write function. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | net: gem: Remove zynq_gem_of_init()Michal Simek2015-12-071-42/+0
| | | | | | | | | | | | | | | | | | This function was used for OF init before DM. Remove this function as the part of move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | net: gem: Enable MDIO bus earlierMichal Simek2015-12-071-5/+9
| | | | | | | | | | | | | | Enable access to MDIO before zynq_gem_init is called. It enables read information about phy earlier. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | net: gem: Check if priv->phydev is validMichal Simek2015-12-071-0/+2
| | | | | | | | | | | | | | Check return value. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | net: gem: Extract phy init codeMichal Simek2015-12-071-17/+30
| | | | | | | | | | | | | | Move phy init code out of zynq_gem_init. DM drivers are normally calling this code from probe function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | net: gem: Remove phydev variableMichal Simek2015-12-071-13/+10
| | | | | | | | | | | | | | Resort code to use priv->phydev variable directly. It will simplify move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | net: gem: Change mii function not to use eth_device structureMichal Simek2015-12-071-13/+19
| | | | | | | | | | | | | | | | Next step to move driver to driver model. Do not use eth_device structure. Use private structure instead. Add iobase to private structure to store gem iobase. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | net: gem: Change mdio_wait prototype to pass regsMichal Simek2015-12-071-4/+3
| | | | | | | | | | | | | | Pass regs instead of dev because this will be chagned by driver model. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | net: gem: Do not continue if phy is not foundMichal Simek2015-12-071-4/+10
| | | | | | | | | | | | | | | | Add return value for phy detection algorithm to stop init function when phy is not found. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | sparc: Use microseconds instead of ticks for timeoutFrancois Retief2015-12-031-1/+1
| | | | | | | | | | | | | | We now use the generic delay method which specifies the timeout as microseconds instead of ticks. Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>
* | net: phy: added aquantia PHY AQR405 supportShaohui Xie2015-11-301-0/+15
| | | | | | | | | | | | | | | | | | The phy can share driver with other aquantia PHYs, so we only add PHY ID. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
* | armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-303-2/+5
| | | | | | | | | | | | | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
* | driver: net: ldpaa: Fix Rx buffer alignmentPrabhakar Kushwaha2015-11-302-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | MC 0.7.1.2 enforces limitation i.e.: "Packets may be corrupted in several combinations of buffer size and frame offsets. Workaround: Use buffers that are of size that is a multiple of 256, and frame offset that is a multiple of 256" Updating the DPNI Eth driver to comply with the restriction. Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | driver: net: ldpaa: Add debug informationPrabhakar Kushwaha2015-11-301-0/+123
| | | | | | | | | | | | | | | | | | | | Add following debug information in the driver - Get various DPNI counter values - Get link status of DPNI objects - Get information of both ends of connection (DPMAC - DPNI) Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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