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* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-051-0/+36
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| * tegra: nand: make ONFI detection workLucas Stach2012-10-291-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | Add the missing bits to the Tegra NAND driver to make ONFI detection work properly. Also add it to the Tegra default config, as it seems to be a reasonable thing to have it available on all boards that use any kind of NAND. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | drivers/mtd/nand: sparse fixesKim Phillips2012-11-042-6/+8
| | | | | | | | | | | | | | | | | | | | nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should it be static? nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should it be static? nand_base.c:2854:1: error: directive in argument list nand_base.c:2856:1: error: directive in argument list Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | drivers/mtd/cfi_flash.c: sparse fixesKim Phillips2012-11-041-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | cfi_flash.c:756:43: warning: Using plain integer as NULL pointer cfi_flash.c:1150:52: warning: cast to non-scalar cfi_flash.c:1433:46: warning: cast truncates bits from constant value (890089 becomes 89) cfi_flash.c:1490:61: warning: cast truncates bits from constant value (1f001f becomes 1f) cfi_flash.c:1508:61: warning: cast truncates bits from constant value (10001 becomes 1) cfi_flash.c:1738:63: warning: cast truncates bits from constant value (10001 becomes 1) cfi_flash.c:1857:6: warning: symbol '__flash_cmd_reset' was not declared. Should it be static? Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | include/linux/byteorder: import latest endian definitions from linuxKim Phillips2012-11-041-10/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot's byteorder headers did not contain endianness attributions for use with sparse, causing a lot of false positives. Import the kernel's latest definitions, and enable them by including compiler.h and types.h. They come with 'const' added for some swab functions, so fix those up, too: include/linux/byteorder/big_endian.h:46:2: warning: passing argument 1 of '__swab64p' discards 'const' qualifier from pointer target type [enabled by default] Also, note: u-boot's historic __BYTE_ORDER definition has been preserved (for the time being at least). We also remove ad-hoc barrier() definitions, since we're including compiler.h in files that hadn't in the past: macb.c:54:0: warning: "barrier" redefined [enabled by default] In addition, including compiler.h in byteorder changes the 'noinline' definition to expand to __attribute__((noinline)). This fixes arch/powerpc/lib/bootm.c: bootm.c:329:16: error: attribute '__attribute__': unknown attribute bootm.c:329:16: error: expected ')' before '__attribute__' bootm.c:329:25: error: expected identifier or '(' before ')' token powerpc sparse builds yield: include/common.h:356:22: error: marked inline, but without a definition the unknown-reason inlining without a definition is considered obsolete given it was part of the 2002 initial commit, and no arm version was 'fixed.' also fixed: ydirectenv.h:60:0: warning: "inline" redefined [enabled by default] and: Configuring for devconcenter - Board: intip, Options: DEVCONCENTER make[1]: *** [4xx_ibm_ddr2_autocalib.o] Error 1 make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2 powerpc-fsl-linux-size: './u-boot': No such file 4xx_ibm_ddr2_autocalib.c: In function 'DQS_autocalibration': include/asm/ppc4xx-sdram.h:1407:13: sorry, unimplemented: inlining failed in call to 'ppc4xx_ibm_ddr2_register_dump': function body not available 4xx_ibm_ddr2_autocalib.c:1243:32: sorry, unimplemented: called from here and: In file included from crc32.c:50:0: crc32table.h:4:1: warning: implicit declaration of function '___constant_swab32' [-Wimplicit-function-declaration] crc32table.h:4:1: error: initializer element is not constant crc32table.h:4:1: error: (near initialization for 'crc32table_le[0]') Signed-off-by: Kim Phillips <kim.phillips@freescale.com> [trini: Remove '#endif' in include/common.h around setenv portion] Signed-off-by: Tom Rini <trini@ti.com>
* tegra: nand: add board pinmuxLucas Stach2012-10-151-1/+0
| | | | | | | | Boards may require a different pinmux setup for NAND than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra20: Move some include files to arch-tegra for sharing with Tegra30Tom Warren2012-10-151-3/+2
| | | | | | | | | | | The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
* MPC85xx: remove support for TQM85xx boardsWolfgang Denk2012-10-051-5/+5
| | | | | | | | | | | | Due to grown code sizes the TQM85xx boards don't build any more with some older tool chains (like ELDK 4.2). As these boards have long reached EOL it seems a waste of effort trying to fix them. The vendor has agreed to drop support for them, too. So let's get rid of them. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> cc: Kim Phillips <kim.phillips@freescale.com> Acked-by: Stefan Roese <sr@denx.de>
* Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2012-09-305-275/+158
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| * SPL: SPI: Enhance spi_spl_load to match the other load functionsTom Rini2012-09-271-11/+12
| | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-09-215-2/+1287
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| * | mxc nand: Fix warning on !MXC_NFC_V2_1Tom Rini2012-09-181-0/+2
| | | | | | | | | | | | | | | | | | | | | In board_nand_init() we only need the 'tmp' variable if MXC_NFC_V2_1 is defined. Signed-off-by: Tom Rini <trini@ti.com>
| * | mxc nand: Homogenize IP revisions with LinuxBenoît Thébaudeau2012-09-171-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the same IP revisions as in Linux in order to make the comparison more clear. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd mxc nand: Merge init functionsBenoît Thébaudeau2012-09-171-30/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge mxc_setup_config1() into board_nand_init() in order to ease the addition of i.MX5 support in the following patches. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd mxc nand: Fix ECC state after read_page_raw_syndrome()Benoît Thébaudeau2012-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mxc_nand_read_page_raw_syndrome() should reenable ECC upon exit. This fixes ECC errors left uncorrected after a call to this function. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd mxc nand: Use _mxc_nand_enable_hwecc()Benoît Thébaudeau2012-09-171-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use _mxc_nand_enable_hwecc() instead of duplicating its code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mxc nand: Access all ecc_status_result fieldsBenoît Thébaudeau2012-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2 consecutive 16-bit registers. This patch reads all the fields of this value, which makes a difference for 4-kiB NF pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mxc nand: cosmectic: Light cleanupBenoît Thébaudeau2012-09-171-6/+3
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mxc nand: Merge mtd and spl register definitionsBenoît Thébaudeau2012-09-171-196/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patches fixes the TODO to use same register definitions in mtd mxc_nand and nand_spl fsl nfc drivers. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driverMarek Vasut2012-09-171-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is based on Linux kernel -next: commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b Author: Brian Norris <computersforpeace@gmail.com> Date: Fri Jul 13 09:28:24 2012 -0700 mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It silently masks off at least one flag that might be set by the driver (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly others. Really, as long as driver writers exercise a small amount of care with NAND_* options, this mask is not necessary at all; it was only here to prevent certain options from accidentally being set by the driver. But the original thought turns out to be a bad idea occasionally. Thus, kill it. Note, this patch fixes some major gpmi-nand breakage. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: Make NAND lock status compatible with MicronJoe Hershberger2012-09-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not the same as others. Instead of bit 1 being lock, it is #lock_tight. To make the driver support either format, ignore bit 1 and use only bit 0 and bit 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: consolidate duplicated constantsJoe Hershberger2012-09-171-6/+0
| | | | | | | | | | | | | | | | | | | | | NAND_CMD_ constants for lock/unlock should be in the header Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: Change ulong to loff_t and size_tJoe Hershberger2012-09-171-2/+3
| | | | | | | | | | | | | | | | | | | | | Missed in previous cleanup. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: Add support for unlock.invertJoe Hershberger2012-09-171-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd: support ONFI multi lun NANDMatthieu CASTET2012-09-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> [scottwood@freescale.com: picked from Linux into U-Boot] Reported-by: Rafael Beims <rafael.beims@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | cfi: Make the flash erase and write operations abortableJoe Hershberger2012-09-031-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for ctrlc() in operations that take time and loop over the flash addresses. In netconsole, tstc() is expensive. Only check once in a while to not slow down the operation significantly. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | cfi: Check for blank before eraseJoe Hershberger2012-09-031-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added an optional check in the CFI driver to evaluate if the sector is already blank before issuing an erase command. Improves erase time by over a factor of 10 if already blank. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge remote-tracking branch 'u-boot-atmel/master'Albert ARIBAUD2012-09-292-3/+19
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| * | spiflash: at25: using common spi flash operationBo Shen2012-09-171-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | Using common spi flash operation function to replace private operation funtion Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | spi: add atmel at25df321 serial flash supportBo Shen2012-09-171-0/+10
| | | | | | | | | | | | | | | | | | | | | Add atmel at25df321 serial flash support Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | atmel_nand: fix the U-Boot output information about nand flash with PMECC ↵Wu, Josh2012-09-131-2/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable. Before the patch, it looks like: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: Initialize PMECC params, cap: 2, sector: 512 > |256 MiB |MMC: mci: 0 |In: serial |Out: serial |Err: serial |Net: macb0 |Hit any key to stop autoboot: 0 After the patch: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: 256 MiB | ... ... |Hit any key to stop autoboot: 0 Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | NAND: MXS: include common.h first so cache.h is included in correct orderTom Warren2012-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | With Simon Glass's include/nand.h alignment changes, some mxs builds were generating errors. Fix is to ensure asm/cache.h is included before linux/mtd/nand.h. Moving common.h to top of include list does that. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* | tegra: nand: Add Tegra NAND driverJim Lin2012-09-073-0/+1284
| | | | | | | | | | | | | | | | | | | | | | | | A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | nand: Try to align the default buffersSimon Glass2012-09-071-1/+2
|/ | | | | | | | | | The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
* at91: atmel_nand: Update driver to support Programmable Multibit ECC controllerWu, Josh2012-09-012-1/+792
| | | | | | | | | | | | | | | | | | The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the PMECC correction capability, the sector size and ROM lookup table offsets in board config file. This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference is in this version it uses registers structure access hardware instead of using macros. It is tested in 9x5 serial boards. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: atmel_nand: remove unused variables.Wu, Josh2012-09-011-2/+1
| | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: atmel_nand: extract HWECC initialization code into one function: ↵Wu, Josh2012-09-011-58/+86
| | | | | | | | | | | | atmel_hw_nand_init_param(). This patch 1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support. 2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix empty newline at EOF error and move return value check into ifdef] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mxs: Convert sys_proto.h prefixes to 'mxs'Otavio Salvador2012-09-011-3/+3
| | | | | | | The sys_proto.h functions (except the boot modes) are compatible with i.MX233 and i.MX28 so we use 'mxs' prefix for its methods. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* arm: omap: Fix switching back to nandecc sw.Jeroen Hofstee2012-09-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | Orjan Friberg wrote at [1]: "For the beagleboard, ecc.size is not explicitly set when doing 'nandecc sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's set to 256 bytes. When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly the format has changed." No patch has been submitted and the issue was still present. This patch adds the mentioned solution. Tested on a tam3517 board. [1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html cc: Orjan Friberg <of@flatfrog.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-011-6/+6
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk2012-09-013-13/+40
|\ | | | | | | | | | | | | | | | | | | | | | | | | * 'sf' of git://git.denx.de/u-boot-blackfin: sf: spansion: Add support for S25FL256S sf: winbond: fix page_size sf: stmicro: add support for N25Q128A sf: stmicro: add support N25Q128 parts sf: stmicro: support JEDEC standard two-byte signature sf: winbond: add W25Q32 cmd_spi: remove superfluous semicolon Signed-off-by: Wolfgang Denk <wd@denx.de>
| * sf: spansion: Add support for S25FL256SMichal Simek2012-08-141-0/+7
| | | | | | | | | | | | | | Add support for Spansion S25FL256S SPI flash. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: winbond: fix page_sizeStephen Warren2012-08-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | Commit a4ed3b6 "sf: inline data constants" modified winbond.c's page_size from 256 to 4096. This prevents either/both of "sf write" writing the correct data, or "sf read" from reading the correct data back. This allows U-Boot running on Compulab Tegra to upgrade itself. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: stmicro: add support for N25Q128AMichal Simek2012-08-101-0/+6
| | | | | | | | | | | | | | Add support for Numonyx N25Q128A SPI flash. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: stmicro: add support N25Q128 partsStephan Linz2012-08-091-0/+6
| | | | | | | | | | | | | | | | | | Adds support for Numonyx's N25Q128 SPI flash. These devices are used on (among others) Avnet Spartan-6 LX9 micro-evaluation boards. Tested with "sf" commands and CONFIG_ENV_IS_IN_SPI_FLASH. Signed-off-by: Stephan Linz <linz@li-pro.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: stmicro: support JEDEC standard two-byte signatureStephan Linz2012-08-091-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are more than the M25Pxx serial flashs that can be used with the stmicro driver, for example: the M25PXxx or N25Qxx serie. All these chips have burned in the original stmicro manufacture id 0x20 together with a standard two-byte signature. In preperation to support all these chips the stmicro driver have to decode the full two-byte signature. Signed-off-by: Stephan Linz <linz@li-pro.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: winbond: add W25Q32Rajeshwari Shinde2012-08-091-0/+5
| | | | | | | | | | | | | | | | | | SMDK EVT1 has a different Winbond part, added its part details to the SPI flash table. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | mtd/cfi_flash: fix write problems for Numonyx P33/30 32 MBit flashsHolger Brunck2012-08-131-22/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 54652991 Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads to problems for smaller versions of this chip e.g. the 32Mbit version with deviceid 0x16 on mgcoge. So move the code for this work around to an own function and check previously manufacturer id and device id to not break other flashes which don't need this work around. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Heiko Schocher <hs@denx.de> cc: Stefan Roese <sr@denx.de> cc: Philippe De Muyter <phdm@macqel.be> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | cfi_flash: add support for Spansion flash PPB sector protectionAnatolij Gustschin2012-08-131-0/+52
|/ | | | | | | | | | Erasing flash sectors protected with persistent protection bit (PPB) mechanism on Spansion flash chips doesn't work. Add sector protection status checking and sector lock and unlock commands to fix this. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* sf: stmicro: add geometrical info for N25Q256 from MicronJérôme Carretero2012-04-081-0/+6
| | | | | | | | Note: because 4-byte addressing is not supported yet, at the moment only the first 16MiB of the device are available. Signed-off-by: Jérôme Carretero <cJ@zougloub.eu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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