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* i.MX28: Add cache support to MXS NAND driverMarek Vasut2012-03-291-3/+50
| | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* NAND: TI: fix warnings in omap_gpmc.cStefano Babic2012-03-271-6/+8
| | | | | | | | | | | | | | The following warnings are reported for boards using SOFT ECC. omap_gpmc.c:33:30: warning: 'hw_nand_oob' defined but not used omap_gpmc.c:78:13: warning: 'omap_hwecc_init' defined but not used omap_gpmc.c:116:12: warning: 'omap_correct_data' defined but not used omap_gpmc.c:182:12: warning: 'omap_calculate_ecc' defined but not used omap_gpmc.c:208:13: warning: 'omap_enable_hwecc' defined but not used Signed-off-by: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com>
* mtd/nand:Fix wrong usage of is_blank() in fsl_ifc_run_commandPrabhakar Kushwaha2012-02-281-24/+28
| | | | | | | | | | | | | | Freescale IFC NAND Machine calculates ECC on 512byte sector and same is used in fsl_ifc_run_command() during ECC status verification. Also this sector is passed to is_blank() for blank checking. It is wrong at first place because is_blank()'s implementation checks for Page size and OOB area size. is_blank() should be called per page for main and OOB area verification. Variables name are redefined to avoid confusion between buffer and ecc sector. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* mtd/nand: Fix IFC driver to support 2K NAND pagePrabhakar Kushwaha2012-02-281-14/+13
| | | | | | | | | | | 1) OOB area should be updated irrespective of NAND page size. Earlier it was updated only for 512byte NAND page. 2) During OOB update fbcr should be equal to OOB size. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: reinstate lazy bad block scanningScott Wood2012-02-281-3/+7
| | | | | | | | | | | | | commit 2a8e0fc8b3dc31a3c571e439fbf04b882c8986be ("nand: Merge changes from Linux nand driver") accidentally reverted commit 13f0fd94e3cae6f8a0d9fba5d367e311edc8ebde ("NAND: Scan bad blocks lazily."). Reinstate the change, as amended by commit ff49ea8977b56916edd5b1766d9939010e30b181 ("NAND: Mark the BBT as scanned prior to calling scan_bbt."). Signed-off-by: Scott Wood <scottwood@freescale.com>
* Revert "nand: make 1-bit software ECC configurable"Scott Wood2012-02-282-5/+1
| | | | | | | | | | | | | | This reverts commit 4fee6c2f295f932b8febdc7ce8731ba045695fa5. It breaks boards that currently rely on soft-ecc, as pointed out here: http://patchwork.ozlabs.org/patch/140872/ The reverted patch should be resubmitted with documentation, and with the CONFIG_MTD_ECC_SOFT selected from every board that needs it. We could start by looking at what NAND driver the board selects, and whether that driver ever asks for soft ECC. Signed-off-by: Scott Wood <scottwood@freescale.com>
* Blackfin: bfin_nand: mark local func staticMike Frysinger2012-02-121-1/+1
| | | | | | This devready func is only used in this driver, so mark it static. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* nand/fsl_elbc: Convert to self-initScott Wood2012-01-261-5/+38
| | | | | | | | This driver doesn't yet make use of the added flexibility (not that that should stop anyone from converting...), but it will with the in-progress hack to support 4k-page NAND. Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: Introduce CONFIG_SYS_NAND_SELF_INITScott Wood2012-01-261-37/+59
| | | | | | | | | | | | | This allows a driver to run code between nand_scan_ident() and nand_scan_tail(), among other things. See the additions to doc/README.nand for details. To allow a gradual transition, Boards that don't set CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but new drivers should not require this, and existing drivers should be converted when convenient. Signed-off-by: Scott Wood <scottwood@freescale.com>
* mtd/nand: Add ONFI support for FSL NAND controllerShengzhou Liu2012-01-261-7/+10
| | | | | | | | - fix NAND_CMD_READID command for ONFI detect. - add NAND_CMD_PARAM command to read the ONFI parameter page. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: make 1-bit software ECC configurableChristian Hitz2012-01-262-1/+5
| | | | | | | | | | The software ECC algorithm is not necessary when hardware ECC is available and can be left out for a smaller image size. Enable with CONFIG_MTD_ECC_SOFT. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: Sanitize ONFI strings.Christian Hitz2012-01-261-1/+22
| | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This is part of the synchronization with the nand driver to the Linux 3.0 state. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: Merge changes to BBT from Linux nand driverChristian Hitz2012-01-261-99/+328
| | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch synchronizes the nand driver with the Linux 3.0 state. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: Merge changes from Linux nand driverChristian Hitz2012-01-261-150/+309
| | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch synchronizes the nand driver with the Linux 3.0 state. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: minor fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: cleanup whitespaceChristian Hitz2012-01-261-74/+78
| | | | | | | | Bring up to date with corresponding file from linux. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: Add more NAND types from Linux nand driverChristian Hitz2012-01-261-0/+35
| | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch merges the additional NAND flash types from the 3.0 Linux kernel. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: Merge BCH code from Linux nand driverChristian Hitz2012-01-263-1/+275
| | | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch merges the BCH ECC algorithm from the 3.0 Linux kernel. This enables U-Boot to support modern NAND flash chips that require more than 1-bit of ECC in software. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_spl_simple: store ecc data on the stackStefano Babic2012-01-261-26/+16
| | | | | | | | | | | | | | | Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM which is likely to contain already loaded data. The patch saves the oob data and the ecc on the stack replacing the fixed address in RAM. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Ilya Yanok <yanok@emcraft.com> CC: Scott Wood <scottwood@freescale.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@googlemail.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* drivers/mtd/nand/nand_spl_load.c: Fix GCC 4.6 warningAnatolij Gustschin2011-12-071-7/+6
| | | | | | | | | | | | | | Fix: nand_spl_load.c: In function 'nand_boot': nand_spl_load.c:31:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* drivers/mtd/nand/nand_spl_simple.c: Fix GCC 4.6 warningsAnatolij Gustschin2011-12-071-4/+2
| | | | | | | | | | | | | | | | | | | | | Fix warnings for both cases: definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST: nand_spl_simple.c: In function 'nand_read_page': nand_spl_simple.c:156:6: warning: variable 'stat' set but not used [-Wunused-but-set-variable] not definded CONFIG_SYS_NAND_HW_ECC_OOBFIRST: nand_spl_simple.c: In function 'nand_read_page': nand_spl_simple.c:196:6: warning: variable 'stat' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* omap_gpmc: use SOFTECC in SPL if it's enabledIlya Yanok2011-12-061-1/+3
| | | | | | | | Use software ECC for the SPL build if support for software ECC in SPL is enabled. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Scott Wood <scottwood@freescale.com>
* nand_spl_simple: add support for software ECCIlya Yanok2011-12-062-2/+11
| | | | | | | | | | This patch adds support for software ECC to the nand_spl_simple driver. To enable this one have to define CONFIG_SPL_NAND_SOFTECC. Tested on OMAP3. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Scott Wood <scottwood@freescale.com>
* Fix regression in SMDK6400Simon Schwarz2011-12-061-26/+2
| | | | | | | | | | | | | | | | | | | s3c64xx.c implemented its own nand_read_byte, nand_write_buf and nand_read_buf functions. This provoked a regression when these functions were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8. This deletes these duplicated functions from s3c64xx.c and adds the generic implementations in nand_base.c to the spl Makefile. It also adds -ffcuntion-sections and -gc-sections to the compilation flags of the SPL to avoid errors originating from unused functions in nand_base.c. Description of the regression: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Cc: scottwood@freescale.com Cc: s-paulraj@ti.com Cc: albert.u.boot@aribaud.net
* nand: Add common functions to linux/mtd/nand.hSimon Schwarz2011-12-061-3/+3
| | | | | | | | | | | | Functions often used in SPL are now part of linux/mtd/nand.h. Static modifiers are removed from these functions in drivers/mtd/nand/nand_base.c. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Cc: scottwood@freescale.com Cc: s-paulraj@ti.com Cc: albert.u.boot@aribaud.net Acked-by: Scott Wood <scottwood@freescale.com>
* Fix Stelian's email addressStelian Pop2011-11-291-1/+1
| | | | | | | Change my old email address which is no longer valid. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* iMX28: Add GPMI NAND driverMarek Vasut2011-11-112-0/+1119
| | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* spl, nand: add 4bit HW ecc oob first nand_read_page functionHeiko Schocher2011-11-031-1/+42
| | | | | | | | | | | | similiar to commit dc7cd8e59ba077f3b4c1a4557c9cd86a31b9ab1f, only adapted for the new spl framework. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Tom Rini <trini@ti.com> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: add support for new spl frameworkHeiko Schocher2011-11-032-0/+59
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* GCC4.6: Use debug() instead of debugX() in s3c24xx_nand.cMarek Vasut2011-10-271-6/+6
| | | | | | | | | | The debugX() macro was always used with debug level 1. There is no point to use it here instead of debug(). Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2011-10-122-0/+262
|\ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mips: MIPS: Jz4740: Add qi_lb60 board support MIPS: Jz4740: Add NAND driver MIPS: Ingenic XBurst Jz4740 processor support
| * MIPS: Jz4740: Add NAND driverXiangfu Liu2011-10-122-0/+262
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Jz4740 NAND flash controller can support: * MLC NAND as well as SLC NAND * all 8-bit/16-bit NAND flash devices * HAMMING and RS hardware ECC * automatic boot up from NAND flash devices nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60. We'll bring up boot-from-NAND support in nand_spl/ in the future. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Daniel <zpxu@ingenic.cn> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | NAND: davinci: choose correct 1-bit h/w ECC regLaurence Withers2011-10-101-13/+13
|/ | | | | | | | | | | | | | | | | | | In nand_davinci_readecc(), select the correct NANDF<n>ECC register based on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC. This allows 1-bit hardware ECC to work with chip select other than CS2. Note this now matches the usage in nand_davinci_enable_hwecc(), which already had the correct handling, and allows refactoring to a single function encapsulating the register read. Without this fix, writing NAND pages to a chip not wired to CS2 would result in in the ECC calculation always returning FFFFFF for each 512-byte segment, and reading back a correctly written page (one with ECC intact) would always fail. With this fix, the ECC is written and verified correctly. Signed-off-by: Laurence Withers <lwithers@guralp.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2011-10-046-72/+41
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: PPC: Fix socrates NAND problem PPC: Fix fsl_upm.c by renaming nand handling functions NAND: Make page, erase, oob size available via cmd_nand mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi NAND: Add -y option to nand scrub command NAND: Add nand read.raw and write.raw commands NAND: Really ignore bad blocks when scrubbing spl, nand: add 4bit HW ecc oob first nand_read_page function mxc_nand: fix a problem writing more than 32MB mxc_nand: fixed some typos (cosmetic) nand: increase chip_delay in mv kirkwood nand driver
| * PPC: Fix fsl_upm.c by renaming nand handling functionsMarek Vasut2011-10-031-8/+8
| | | | | | | | | | | | | | | | This avoids colision with nand subsystem's functions. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poimhench2011-10-031-30/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The eLBC NAND driver currently follows up each program/write operation with a read-back of the page, in order to [ostensibly] fill in ECC data for the caller. However, the page address used for this read is always -1, so the read will never work correctly. Remove this useless (and potentially problematic) block of code. v2: fix broken mailer Signed-off-by: mhench <mhench@elutions.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * NAND: Really ignore bad blocks when scrubbingMarek Vasut2011-10-032-22/+9
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: use chip instead of redundant priv_nand] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc_nand: fix a problem writing more than 32MBHelmut Raiger2011-10-031-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When writing 0x4000 to the unlockend_blkaddr register, large writes to a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF to this register for V2 of the nand controller. However on an i.MX31 this also fixes writes larger than 32MB. The datasheet is very unspecific, but (0x4000=16384)*2000 roughly fits the limits we're encountering with NAND writes. This problem might be NAND chip specific. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc_nand: fixed some typos (cosmetic)Helmut Raiger2011-10-031-10/+9
| | | | | | | | | | Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand: increase chip_delay in mv kirkwood nand driverStefan Bigler2011-10-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay. The Data Transfer from Cell to Register is >= 35us. Other Vendors and older chips normally use >= 25us. To have enough margin 40us is selected. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Stefan Roese <sr@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-042-0/+851
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * nand: Freescale Integrated Flash Controller NAND supportDipen Dudhat2011-09-292-0/+851
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND support (including spl) on IFC, such as is found on the p1010. Note that using hardware ECC on IFC with small-page NAND (which is what comes on the p1010rdb reference board) means there will be insufficient OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should work, as it does not use OOB for anything but ECC. When hardware ECC is not enabled in CSOR, software ECC is now used. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> [scottwood@freescale.com: ECC rework and misc fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
* | GCC4.6: Squash warning in nand_bbt.cMarek Vasut2011-10-011-4/+1
| | | | | | | | | | | | | | | | | | nand_bbt.c: In function ‘search_bbt’: nand_bbt.c:465:6: warning: variable ‘bits’ set but not used [-Wunused-but-set-variable] Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
* | spl: add NAND Library to new SPLSimon Schwarz2011-09-304-4/+282
|/ | | | | | | | Adds NAND library to SPL. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* NAND: Add 16bit NAND support for the NDFCAlex Waterman2011-07-011-4/+29
| | | | | | | | | | | | | | | | | | | This patch adds support for 16 bit NAND devices attached to the NDFC on ppc4xx processors. Two config entries were added: CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a 16 bit device is attached. CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus Controller configuration register. Also, a new ndfc_read_byte() function was added which does not first convert the data to little endian. The NAND SPL was also modified to do 16bit bad block testing when a 16 bit chip is being used. Signed-off-by: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: drop trailing all-0xff pages if requestedBen Gardiner2011-07-011-3/+37
| | | | | | | | | | | | | | | | | | | | Add a flag to nand_read_skip_bad() such that if true, any trailing pages in an eraseblock whose contents are entirely 0xff will be dropped. The implementation is via a new drop_ffs() function which is based on the function of the same name from the ubiformat utility by Artem Bityutskiy. This is as-per the reccomendations of the UBI FAQ [1] [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: treat WITH_YAFFS_OOB as a modeBen Gardiner2011-07-011-0/+3
| | | | | | | | | | | | | When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an operation which is mutually exclusive with the 'usual' way of writing. Add a check that client code does not specify WITH_YAFFS_OOB along with any other flags and add a comment indicating that the WITH_YAFFS_OOB flag should not be mixed with other flags. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: convert nand_write_skip_bad() to flagsBen Gardiner2011-07-011-4/+4
| | | | | | | | | | | | | | | | | | | | | | In a future commit the behaviour of nand_write_skip_bad() will be further extended. Convert the only flag currently passed to the nand_write_ skip_bad() function to a bitfield of only one allocated member. This should avoid an explosion of int's at the end of the parameter list or the ambiguous calls like nand_write_skip_bad(info, offset, len, buf, 0, 1, 1); nand_write_skip_bad(info, offset, len, buf, 0, 1, 0); Instead there will be: nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB | WITH_OTHER); Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_base: trivial: fix comment read/write commentBen Gardiner2011-07-011-1/+1
| | | | | | | | Replace an incorrect 'read' with 'write' in a comment. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: rearrange ONFI revision checking, add ONFI 2.3Florian Fainelli2011-04-151-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sync with Brian's patch on Linux in nand_flash_detect_onfi() commit b7b1a29d94c17e4341856381bccb4d17495bea60 Author: Brian Norris <computersforpeace@gmail.com> Date: Sun Dec 12 00:23:33 2010 -0800 mtd: nand: rearrange ONFI revision checking, add ONFI 2.3 In checking for the ONFI revision, the first conditional (for checking "unsupported" ONFI) seems unnecessary. All ONFI revisions should be backwards-compatible; even if this is not the case on some newer ONFI revision, it should simply fail the second version-checking if-else block (i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we move our "unsupported" condition after having checked each bit field. Also, it's simple enough to add a condition for ONFI revision 2.3. Note that this does *NOT* mean we handle all new features of ONFI versions above 1.0. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
* NAND: Fix integer overflow in ONFI detection of chips >= 4GiBFlorian Fainelli2011-04-151-1/+1
| | | | | | | | | | | | | | This patch sync with David's patch on Linux in nand_flash_detect_onfi() commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5 Author: David Woodhouse <David.Woodhouse@intel.com> Date: Fri Dec 3 16:36:34 2010 +0000 mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
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