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* esdhc: Add CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE macrosWang Huan2014-09-081-0/+5
For LS102xA, the processor is in little-endian mode, while esdhc IP is in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE are added. So accessing ESDHC registers can be determined by ESDHC IP's endian mode. Signed-off-by: Alison Wang <alison.wang@freescale.com>
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