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* axs103: add support of generic OHCI USB 1.1 controllerAlexey Brodkin2015-12-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | This commit adds support of USB 1.1 storage media on AXS103 board. For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing messages like this: ------------------------>8------------------- AXS# usb start starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80 unable to get device descriptor (error=-1) 1 USB Device(s) found ------------------------>8------------------- As a work-around we're falling back to USB 1.1. Indeed it is much slower but at least USB storage devices are usable on AXS103. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-12-196-0/+12
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| * arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
* | nios2: Enable support for fitImageMarek Vasut2015-12-192-0/+2
|/ | | | | | | | | | The uImage format is legacy for years now, enable support for the fitImage format, which allows combining multiple files (kernel and dtb) into a single file, offers better protection of the payload and so on. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* microblaze: Enable DM by defaultMichal Simek2015-12-181-1/+0
| | | | | | Enable DM for the whole architecture. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: Enable OF_CONTROL by defaultMichal Simek2015-12-181-1/+0
| | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: Use malloc setting via KconfigMichal Simek2015-12-181-0/+2
| | | | | | | Clean board specific file. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: gem: Add driver dependencies to PHYLIBMichal Simek2015-12-1810-10/+0
| | | | | | | Clear driver dependecies via Kconfig. Remove PHYLIB dependency from the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Update ZYBO config optionsNathan Rossi2015-12-181-0/+3
| | | | | | | | | | | Update the ZYBO device tree and enable config options that relate to the added devices in the device tree. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2015-12-162-0/+27
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| * rockchip: Add basic support for kylin boardhuang lin2015-12-131-0/+26
| | | | | | | | | | | | | | | | | | kylin board use rk3036 SOC, 512M sdram, 8G emmc. This add some basic files required to allow the board to output serial message and can run command(mmc info etc). Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: firefly: Use tiny-printfSjoerd Simons2015-12-131-0/+1
| | | | | | | | | | | | | | | | Switch to using tiny-printf for the firefly SPL, this reduces the SPL by around 1800 bytes bringing it back under the 32k limit for both gcc 4.9 and gcc 5. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
* | armv8/ls1043ardb: add SECURE BOOT target for NORAneesh Bansal2015-12-151-0/+9
|/ | | | | | | | | | LS1043ARDB Secure Boot Target from NOR has been added. - Configs defined to enable esbc_validate. - ESBC Address in header is made 64 bit. - SMMU is re-configured in Bypass mode. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* sunxi: select SYS_NS16550 from KconfigHans de Goede2015-12-1074-74/+0
| | | | | | | Select SYS_NS16550 from Kconfig instead of setting it in all our defconfig files. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add suport for A83T HomletV2 Board by Allwinnervishnupatekar2015-12-101-0/+25
| | | | | | | | | | | | Add dts and defconfig for h8homletv2 board. H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner. It has UART, ethernet, USB, HDMI, etc ports on it. A83T patches are tested on this board. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* axs10x: add support of generic EHCI USB 2.0 controllerAlexey Brodkin2015-12-082-0/+12
| | | | | | | | This commit adds support of USB 2.0 storage media on AXS10x boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-12-0711-0/+27
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| * ARM: zynq: Enable debug console for zc702Michal Simek2015-12-071-0/+4
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Enable FIT config option via KconfigMichal Simek2015-12-071-0/+2
| | | | | | | | | | | | Remove configuration options from board file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Move gem to KconfigMichal Simek2015-12-0711-0/+11
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * ARM: zynq: Remove PHYLIB from config to defconfigMichal Simek2015-12-0710-0/+10
| | | | | | | | | | | | | | Move PHYLIB from board config to defconfig Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | arm: socfpga: Enable CONFIG_DM_MMCMarek Vasut2015-12-077-0/+7
| | | | | | | | | | | | | | | | | | | | | | Enable driver model MMC support on SoCFPGA. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* | arm: socfpga: Add SoCFPGA SR1500 boardStefan Roese2015-12-071-0/+18
|/ | | | | | | | | | | | | | | The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* tegra: Remove merge markers in some Kconfig filesSimon Glass2015-12-054-12/+0
| | | | | | | | | | | | These were added by mistake in commit fde7e189. They cause a warning when configuring the boards. Remove them. Fixes: fde7e18938d8 ("dm: tegra: pci: Move CONFIG_PCI_TEGRA to Kconfig") Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reported-by: Kevin Hilman <khilman@linaro.org> Acked-by: Thomas Chou <thomas@wytron.com.tw>
* defconfig: dra74_evm: enable serial driver modelMugunthan V N2015-12-051-0/+1
| | | | | | | | Enable serial driver model for dra74_evm as ns16550 supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-12-041-2/+3
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| * cgtqmx6eval: Add DFU supportOtavio Salvador2015-11-251-0/+12
| | | | | | | | | | | | | | Add MMC and SPI DFU support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * cgtqmx6eval: Add SPL supportOtavio Salvador2015-11-251-11/+0
| | | | | | | | | | | | | | | | | | Congatec has several MX6 boards based on quad, dual, dual-lite and solo. Add SPL support so that all the variants can be supported Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
* | iocon: Disable FIT_VERBOSETom Rini2015-12-011-0/+1
| | | | | | | | | | | | In order to fit into image constraints again, remove this feature. Signed-off-by: Tom Rini <trini@konsulko.com>
* | rockchip: Explicitly set CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LENSjoerd Simons2015-12-012-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that u-boot relocates the malloc area in SPL to SDRAM, with the malloc area sitting below the SPL_STACK_R_ADDR the SPL_STACK_R_MALLOC_SIMPLE_LEN needs to be set explicitly for rockchip as its SPL_STACK_R_ADDR (512kb) is smaller then STACK_R_MALLOC_SIMPLE_LEN (1Mb). Using the same value as SYS_MALLOC_F_LEN (8kb) is enough to load u-boot from SD card. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | rockchip: Add basic support for evb-rk3036 boardhuang lin2015-12-011-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc) Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Moved board Kconfig fragment from previous patch into this one to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - moved board Kconfig fragment from previous patch into this one
* | dm: core: Add SPL Kconfig for REGMAP and SYSCONhuang lin2015-12-013-0/+6
| | | | | | | | | | | | | | | | Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can remove from SPL stage. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: pci: Disable PCI compatibility functions by defaultSimon Glass2015-12-011-0/+1
| | | | | | | | | | | | | | | | | | We eventually need to drop the compatibility functions for driver model. As a first step, create a configuration option to enable them and hide them when the option is disabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: tegra: pci: Move CONFIG_PCI_TEGRA to KconfigSimon Glass2015-12-016-0/+18
| | | | | | | | | | | | | | Move this option to Kconfig and fix up all users. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | x86: tsc: Remove legacy timer codesBin Meng2015-12-012-2/+0
| | | | | | | | | | | | | | | | | | | | | | Now that we have converted all x86 boards to use driver model timer, remove these legacy timer codes in the tsc driver. Note this also removes the TSC_CALIBRATION_BYPASS Kconfig option, as it is not needed with driver model. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | x86: Convert to use driver model timerBin Meng2015-12-019-0/+10
| | | | | | | | | | | | | | Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-11-302-0/+22
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| * | arm: atmel: Add SAMA5D2 Xplained boardWenyou Yang2015-11-302-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board supports following features: - Boot media support: SD card/e.MMC/SPI flash, - Support LCD display (optional, disabled by default), - Support ethernet, - Support USB mass storage. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> [fix checkpatch warnings] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-11-3019-14/+127
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| * | | armv8/ls1043ardb: add DSPI supportGong Qianyu2015-11-303-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the U-Boot Driver Model. Just enable Freescale DSPI driver and set DSPI related parameters in dts file. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043aqds: dts: add dtb supportGong Qianyu2015-11-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reuse the dts files from ls1043a linux kernel. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043aqds: add LS1043AQDS board supportShaohui Xie2015-11-304-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1043AQDS Specification: ------------------------- Memory subsystem: * 2GByte DDR4 DIMM * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 16 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two RGMII ports * XFI 10G port * SGMII * QSGMII with 4x 1G ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> [York Sun: Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8/ls1043ardb: dts: add dtb supportGong Qianyu2015-11-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reuse dts files from ls1043a linux kernel. Some parts in dts files may not be needed by U-Boot. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-3012-6/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's LS2085A is a another personality of LS2080A SoC with support of AIOP and DP-DDR. This Patch adds support of LS2085A Personality. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Updated MAINTAINERS files Dropped #ifdef in cpu.h Add CONFIG_SYS_NS16550=y in defconfig] Reviewed-by: York Sun <yorksun@freescale.com>
| * | | armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-306-8/+8
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc. So renaming existing LS2085A code base to reflect LS2080A (Prime personality) Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: Dropped #ifdef in cpu.c for cpu_type_list] Reviewed-by: York Sun <yorksun@freescale.com>
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