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* ARM: DRA7: Enable FITLokesh Vutla2016-05-271-2/+0
| | | | | | | | Use a single defconfig for all DRA7 platforms by enabling FIT and delete the platform specific defconfigs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: dra7: fit: add support for selecting dtb dynamicallyLokesh Vutla2016-05-271-0/+12
| | | | | | | | FIT allows for a multiple dtb in a single image. SPL needs a way to detect the right dtb to be used. Adding support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* ARM: omap5: add ft_board_setup for dra7xx/am57xxDaniel Allred2016-05-272-0/+18
| | | | | | | | | | | | | | Adds the board specific ft_board_setup() functions that are called when CONFIG_OF_BOARD_SETUP is defined. These functions will currently just call the ft_cpu_setup() function. Adds CONFIG_OF_BOARD_SETUP to the defconfig files for dra72_evm, dra74_evm, and am57xx_evm. Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ti: AM43xx: board: Detect AM43xx HS EVMMadan Srinivas2016-05-273-5/+15
| | | | | | | | | | | | | | | | | | | Adds code to detect AM43xx HS EVMS - the string in the I2C EEPROM for HS EVMs differs from GP EVMs. Adds code to for evm detection, regardless of whether the evm is for GP or HS parts, and updates board init to use that. Modifies findfdt command to pick up am437x-gp-evm.dtb for the HS EVMs also, as the boards are similar except for some security specific changes around power supply and enclosure protection. Signed-off-by: Madan Srinivas <madans@ti.com> Signed-off-by: Daniel Allred <d-allred@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Delete tests of CONFIG_OF_LIBFDT when testing CONFIG_OF_BOARD_SETUPRobert P. J. Day2016-05-2723-48/+48
| | | | | | | | | | | | | | | | Since CONFIG_OF_BOARD_SETUP depends on CONFIG_OF_LIBFDT: config OF_BOARD_SETUP bool "Set up board-specific details in device tree before boot" depends on OF_LIBFDT ... remove superfluous tests of CONFIG_OF_LIBFDT when testing for CONFIG_OF_BOARD_SETUP. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> [trini: Typo fix: s/ifdefi/ifdef/] Signed-off-by: Tom Rini <trini@konsulko.com>
* MARVELL: Delete now-superfluous board/Marvell/{common, include} dirs.Robert P. J. Day2016-05-279-2450/+0
| | | | | | | With dropping support for some boards and the deletion of some source files, it appears that both of these directories are now superfluous. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* sh: Fix build errors for generic boardSimon Glass2016-05-273-0/+3
| | | | | | | | | | | | This includes the following fixes: - Define needed __init_end symbol - see initr_reloc_global_data() - Drop SH-specific struct bd_info - Add an empty relocate_code() function This prevents build errors with generic board, but the code will still need work. Perhaps this is a better alternative than deleting the code. Signed-off-by: Simon Glass <sjg@chromium.org>
* Remove/update old generic-board documentation and warningSimon Glass2016-05-271-2/+1
| | | | | | | | Remove the warning from the Makefile, since boards that do not use generic board will no longer build. Also update documentation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* arm: meson: implement calls to secure monitorBeniamino Galvani2016-05-271-0/+16
| | | | | | Implement calls to secure monitor to read the MAC address from e-fuse. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
* arm: add initial support for Amlogic Meson and ODROID-C2Beniamino Galvani2016-05-275-0/+136
| | | | | | | | | | | | This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1]. [1] https://patchwork.ozlabs.org/patch/603583/ Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-2510-13/+28
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| * MIPS: Move CONFIG_SYS_TEXT_BASE to KconfigPaul Burton2016-05-269-0/+28
| | | | | | | | | | | | | | | | | | Move CONFIG_SYS_TEXT_BASE to Kconfig, and add default values in board Kconfig files matching what was present in their config headers. This will make it cleaner to conditionalise the value for Malta based on 32 vs 64 bit builds. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: Tidy up UART address selectionPaul Burton2016-05-261-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | The address of the UART differs based upon the system controller because it's actually within the I/O port region, which is in a different location for each system controller. Rather than handling this as 2 UARTs with the correct one selected at runtime, use I/O port accessors for the UART such that access to it gets translated into the I/O port region automatically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-05-252-27/+36
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| * | sunxi: Enable a bunch of commands by default on sunxiHans de Goede2016-05-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently a set of CONFIG_CMD_FOO defines was moved from being defined in config_distro_defaults to Kconfig, and added to all sunxi defconfigs to compensate. Instead of explictly selecting these in all sunxi defconfigs, simply always select these for sunxi boards. This makes the defconfigs simpler and ensures a consistent set of available commands across all sunxi boards. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | Revert "sunxi: Reserve ATF memory space on A64"Andre Przywara2016-05-251-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM Trusted Firmware (ATF) code now lives in SRAM on the Pine64/A64, so we can claim the whole of DRAM for OS use. This reverts commit 3ffe39ed2b66af71c7271d0cef2a248b5bf7dfdb. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: power: add AXP809 supportChen-Yu Tsai2016-05-251-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | The A80 uses the AXP809 as its primary PMIC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: power: axp818: Add support for switch SWChen-Yu Tsai2016-05-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The AXP818 has a switchable output, SW. This is commonly used for controlling power to the LCD backlight. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Disable VIDEO for SoCs without display supportChen-Yu Tsai2016-05-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The newer chips use a newer display pipeline, which is not supported. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Add default MMC0 card detect pin for A83T, H3 and A64 SoCsChen-Yu Tsai2016-05-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | A83T, H3, and A64 have a dedicated pin for card detect on the PF pingroup. This is used in all designs. Set it as the default. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Sort SoC variants by family (sunXi) first, chip name secondChen-Yu Tsai2016-05-251-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | In most other places, we sort SoC descriptions by family (sunXi) first, then by the chip name (A20). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: make SoC variant choice mandatoryChen-Yu Tsai2016-05-251-1/+0
| |/ | | | | | | | | | | | | | | | | The user should always select an SoC variant to support. Not choosing one doesn't make sense for a bootloader. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-05-253-2/+7
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| * powerpc:t4240rdb: Disable the non-existent ethernet ports on T4240RDBYing Zhang2016-05-241-0/+5
| | | | | | | | | | | | | | | | | | Disable the non-existent ethernet ports on T4240RDB:FM1_DTSEC5, FM1_DTSEC6, FM2_DTSEC5 and FM2_DTSEC6. Signed-off-by: Ying Zhang <ying.zhang22455@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * powerpc/t208xrdb: Update MAINTAINERS fileYork Sun2016-05-191-1/+1
| | | | | | | | | | Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
| * powerpc/t208xqds: Update MAINTAINERS fileYork Sun2016-05-191-1/+1
| | | | | | | | | | Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-05-2413-38/+48
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| * | armv8: ls1043ardb: invert irq pin polarity for AQR105 PHYShaohui Xie2016-05-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | To use AQR105 PHY's interrupt, we need to invert the IRQ pin polarity by setting relative bit in SCFG_INTPCR register, because AQR105 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | arch/arm, arch/powerpc: add # of SEC engines on the SOCAlex Porosanu2016-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SOCs, specifically the ones in the C29x familiy can have multiple security engines. This patch adds a system configuration define which indicates the maximum number of SEC engines that can be found on a SoC. Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1043ardb: fix types of variablesQianyu Gong2016-05-181-3/+3
| | | | | | | | | | | | | | | | | | | | | Using u16 for cfg_rcw_src and u8 for sd1refclk_sel is enough. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1043a: remove redundant code in board filesQianyu Gong2016-05-182-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | gd->env_addr will be initialized in env_init() in common/env_nowhere.c if CONFIG_ENV_IS_NOWHERE is defined. So no need to do it again. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8/ls1043ardb: fix the limitation of using 'cpld reset'Qianyu Gong2016-05-182-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current 'cpld reset' will just write global_rst register but couldn't switch to NOR boot if the board's switches are for NAND/SD boot. So need to write rcw source registers for NOR boot as well. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | arm: uniform usage of u32 in ls102x caam configVincent Siles2016-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | | Mix usage of uint32_t and u32 fixed in favor of u32. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | arm: Fix SCFG ICID reg addressesVincent Siles2016-05-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the LS102x boards, in order to initialize the ICID values of masters, the dev_stream_id array holds absolute offsets from the base of SCFG. In ls102xa_config_ssmu_stream_id, the base pointer is cast to uint32_t * before adding the offset, leading to an invalid address. Casting it to void * solves the issue. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080a: Update MAINTAINERS filePrabhakar Kushwaha2016-05-172-2/+2
| | | | | | | | | | | | | | | | | | | | | Update MAINTAINERS file for ls2080aqds and ls2080ardb platforms. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8/ls2080ardb: Update DDR timing to support more UDIMMsShengzhou Liu2016-05-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimize DDR timing for good margins to support new Transcend and Apacer DDR4 UDIMM besides current Micron UDIMM. Verified 1333MT/s, 1600MT/s, 1866MT/s, 2133MT/s rate with following UDIMM on LS2080ARDB. - Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z - Apacer UDIMM: 78.C1GM4.AF10B - Transcend UDIMM: TS1GLH72V1H Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8/ls1043: Add workaround for DDR erratum A-008850Shengzhou Liu2016-05-176-16/+8
| |/ | | | | | | | | | | | | | | | | Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-05-2415-13/+75
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| * | ARM: zynq: Simplify zynq configurationMichal Simek2016-05-2412-12/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extending Kconfig for adding new platform is a lot of work for nothing. Setting SYS_CONFIG_NAME directly in Kconfig and remove all dependencies on TARGET_ZYNQ_* options including SPL. As a side-effect it also remove custom init folder for ps7_init_gpl.* files. Folder is chosen based on device-tree file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM64: zynqmp: Add SPL support supportMichal Simek2016-05-242-1/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support RAM and MMC boot mode in SPL also with SPL_FIT images. In MMC boot mode two boot options are available: 1) Boot flow with ATF(EL3) and full U-Boot(EL2): aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000 -d bl31.bin atf.ub cp spl/boot.bin <sdcard fat partition> cp atf.ub <sdcard fat partition> cp u-boot.bin <sdcard fat partition> 2) Boot flow with full U-Boot(EL3): cp spl/boot.bin <sdcard> cp u-boot*.img <sdcard> 3) emmc boot mode dd if=/dev/zero of=sd.img bs=1024 count=1024 parted sd.img mktable msdos parted sd.img mkpart p fat32 0% 100% kpartx -a sd.img mkfs.vfat /dev/mapper/loop0p1 mount /dev/mapper/loop0p1 /mnt/ cp spl/boot.bin /mnt cp u-boot.img /mnt cp u-boot.bin /mnt cp atf.ub /mnt umount /dev/mapper/loop0p1 kpartx -d sd.img cp sd.img /tftpboot/ and program it via u-boot tftpb 10000 sd.img mmcinfo mmc write 10000 0 $filesize mmc rescan mmc part ls mmc 0 psu_init() function contains low level SoC setup generated for every HW design by Xilinx design tools. xil_io.h is only supporting file to fix all dependencies from tools. The same solution was used on Xilinx Zynq. The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which stays at the same location all the time. Bootrom expects starting address to be at 0xfffc0000 that's why this address is SPL_TEXT_BASE. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM64: zynqmp: Add support for reading MAC from eepromMichal Simek2016-05-241-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for on board eeprom with programmed MAC for using in u-boot to have uniq address for every board. Most of the time uniq MAC address is on a label on the board. If address is not programmed use these command to program it. On zcu102: ZynqMP> mm.b 0 00000000: 00 ? 00 00000001: a0 ? 0a 00000002: 35 ? 35 00000003: 02 ? 02 00000004: 00 ? ef 00000005: 00 ? 67 00000006: 00 ? q i2c dev 5 i2c write 0 54 20 6 i2c md 54 20 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-05-245-2/+318
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| * | | board: sama5d2_xplained: change SDHCI GCK's clock source to UPLLWenyou Yang2016-05-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the clock source of the SDHCI's generated clock from PLLA to UPLL clock to align to Linux driver. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | | board: atmel: sama5d2_xplained: fix the missing pin config of SDMMC0Wenyou Yang2016-05-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the missing pin config of the SDMMC0 interface. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | | board: atmel: add SAMA5D2 PTC Engineering boardWenyou Yang2016-05-244-0/+315
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | The board supports following features: - Boot media support: NAND Flash/SPI Flash - Support ethernet - Support USB mass storage Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-05-2313-0/+100
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| * | x86: galileo: Override SMBIOS product nameBin Meng2016-05-231-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Override the default product name U-Boot reports in the SMBIOS table, to be compatible with the Intel provided UEFI BIOS, as Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of it to do different board level configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | x86: baytrail: Add .gitignore for ACPI enabled boardsBin Meng2016-05-233-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | x86: baytrail: Enable ACPI table generation for all boardsBin Meng2016-05-239-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable ACPI table generation by creating a DSDT table for all baytrail boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-2313-1/+262
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