| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch adds support for the X600 SPEAr600 based board. Its also
the first SPEAr600 board that uses the newly introduced SPEAr600
SPL support. Xloader is not necessary any more. By using the new
"u-boot.spr" make target, one image will generated containing both,
U-Boot SPL (with mkimage header as needed by the SPEAr BootROM, and
the main U-Boot with mkimage header.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| | |
If while booting the power switch is in OFF position, turn off the fan,
too.
Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The kmnusa board uses a mv88e6352 switch that is connected to the main
eth interface of the kirkwood. Therefore the switch must be configured
so that the kirkwood's egiga eth inferface can be used.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
The hardware design of the IB-NAS62x0 causes the SATA activity
LEDs to be on when idle by default. Reverse the polarity of the
activity LEDs in early init.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Cc: Luka Perkov <uboot@lukaperkov.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Luka Perkov <uboot@lukaperkov.net>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Some boards may differ only in the SDRAM size. This function allows to
fix the size accordingly and we can use the same u-boot binary for both
boards.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Add support for new board iConnect from Iomega.
More information about the device can be found here:
http://go.iomega.com/en/products/network-storage-desktop/wireless-data-station/network-hard-drive-iconnect/?partner=4735
Signed-off-by: Luka Perkov <uboot@lukaperkov.net>
Tested-by: Wojciech Dubowik <wojciech.dubowik@neratec.com>
Tested-by: Tim Fletcher <tim@night-shade.org.uk>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This patch adds support for the LaCie boards Network Space v2 (Lite and
Mini). This two boards are derived from the Network Space v2 and a lot
of hardware caracteristics are shared.
- CPU: Marvell 88F6192 800Mhz
- SDRAM memory: 128MB DDR2 200Mhz
- 1 SATA port: internal
- Gigabit ethernet: PHY Marvell 88E1318
- Flash memory: SPI NOR 512KB (Macronix MX25L4005A)
- i2c EEPROM: 512 bytes (24C04 type)
- 2 USB2 ports (Lite only): host and host/device
- 1 push button
- 1 SATA LED (bi-color, blue and red)
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
|
|/
|
|
|
|
|
|
|
|
| |
Support of the MINI2440 board from FriendlyARM from
an old version of u-boot :
http://repo.or.cz/r/u-boot-openmoko/mini2440.git
Currently, supporting only boot from NOR.
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
|
|
|
|
|
|
|
|
|
| |
This initializes GPIO, without using PFC framework in
board_early_init_f function. It is because it cannot initialize
normally when PFC is used.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
|
| |
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The Armadillo-800EVA board has Renesas R-Mobile R8A7740, 512MB DDR3-SDRAM,
Ethernet, and more.
This patch supports the following functions:
- 512MB DDR3-SDRAM
- Serial console (SCIF)
- Ethernet MAC(MII) & PHY(SMSC)
Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
|
|
|
| |
Do soft power on reset in U-Boot reset command.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Problem:
Linux kernel hangs up when it write a file to NFS mounted directory.
Solution:
Modify bus controller setting for CS4, which connected smsc9221 ethernet
controller.
Detail:
Modify CS4BCR bit[29:28] (IWW[1:0]) from 00 to 01.
Modify CS4BCR bit[20:19] (IWRRD[1:0]) from 00 to 01.
Modify CS4BCR bit[17:16] (IWRRS[1:0]) from 00 to 01.
Modify CS4WCR bit[27:26] (WSW[1:0]) from 10 to 11
Modify CS4WCR bit[25:24] (WHW[1:0]) from 01 to 10
Modify CS4WCR bit[18:16] (WW[2:0]) from 101 to 111
Modify CS4WCR bit[13:11] (SW[2:0]) from 010 to 011
Modify CS4WCR bit[10:7] (WR[3:0]) from 1000 to 1011
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
|
|
|
| |
Adjust low level hardware setting in s_init.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM,
USB, Ethernet, and more.
This patch supports the following functions:
- 512MB DDR2-SDRAM
- 16MB NOR Flash memory
- Serial console (SCIF)
- Ethernet (SMSC)
- I2C
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch adds support for networking in SPL. Some devices are
capable of loading SPL via network so it makes sense to load the
main U-Boot binary via network too. This patch tries to use
existing network code as much as possible. Unfortunately, it depends
on environment which in turn depends on other code so SPL size
is increased significantly. No effort was done to decouple network
code and environment so far.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@ti.com>
|
|
|
|
|
|
|
|
| |
Do not allow to overwrite it when video is enabled.
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
CC: Tom Rini <trini@ti.com>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|
|
|
|
|
| |
Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
CC: Tom Rini <trini@ti.com>
Acked-by: Stefano Babic <sbabic@denx.de>
|
|\ |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
This file documents when to build for da850evm and when to build for
da850_am18xxevm. It also documents how to write the u-boot.ais file to
persistent storage (such as SPI), in some cases as well as how to write
a recovery image.
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Prabhakar Lad <prabhakar.lad@ti.com>
|
| |
| |
| |
| |
| |
| |
| |
| | |
Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing. Change how this works to
be opt-in and only turned on for omap4/5 now.
Signed-off-by: Tom Rini <trini@ti.com>
|
| |\ |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
Move highly platform dependant code into its own functions to reduce the
number of #ifdefs in lcd_display_bitmap
To avoid breaking the mcc200 board which does not #define
CONFIG_CMD_BMP, this patch also implements bmp_display() for mcc200.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
|
| |\ \ |
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
LAW init is skipped in the SPL payload because it's assumed that the SPL
has taken care of it -- so make sure the SPL loads all the LAWs as is
done on other boards.
This bug was introduced by:
commit 4589728e214958a4e6e011a081a68d360c49d7a5
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Fri Nov 11 08:14:53 2011 -0600
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
LAW entries not needed during SPL phase.
Signed-off-by: Scott Wood <scottwood@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
The P3060 was cancelled before it went into production, so there's no point
in supporting it.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
enum board_slots contained six values, where SLOT1 == 1, SLOT2 == 2, and
so on. This is pointless, so remove it. Also move the lane_to_slot[]
array to the top of the file so that it can be used by other functions.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
In order to figure out which SerDes lane a given Fman port is connected
to, we need a function that maps the fm_port namespace to the srds_prtcl
namespace.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Using the raw value of 0x80000000 directly in the code can
lead to "count the zeros" bugs like that fixed in commit
718e9d13b98 ("MPC85xxCDS: Fix missing LCRR_DBYP bits for
66-133MHz LBC")
Change all existing raw values to use the symbolic value of
LCRR_DBYP instead.
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
There was an extra 0 in front of the value we were using to mask,
remove it to improve the code.
Also fix the value written to ddr_sdram_cfg to set the bus width
properly to 16 bits
Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
Provides a tool to build boot Image for PBL(Pre boot loader) which is
used on Freescale CoreNet SoCs, PBL can be used to load some instructions
and/or data for pre-initialization. The default output image is u-boot.pbl,
for more details please refer to doc/README.pblimage.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.
Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the corenet platform, ucode is
for Fman.
NOTE: Because the slave can not erase, write master's NOR flash by
PCIE interface, so it can not modify the ENV parameters stored
in master's NOR flash using "saveenv" or other commands.
environment and requirement:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image is in master NOR flash.
3. Put the slave's ucode and ENV into it's own memory space.
4. Normally boot from local NOR flash.
5. Configure PCIE system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to one PCIE interface by RCW.
3. RCW should configure the SerDes, PCIE interfaces correctly.
4. Must set all the cores in holdoff by RCW.
5. Must be powered on before master's boot.
For the slave module, need to finish these processes:
1. Set the boot location to one PCIE interface by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID of one PCIE for the boot.
4. Set a specific TLB entry in order to fetch ucode and ENV from
master.
5. Set a LAW entry with the TargetID one of the PCIE ports for
ucode and ENV.
6. Slave's u-boot image should be generated specifically by
make xxxx_SRIO_PCIE_BOOT_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
In addition, the processes are very similar between boot from SRIO and
boot from PCIE. Some configurations like the address spaces can be set to
the same. So the module of boot from PCIE was added based on the existing
module of boot from SRIO, and the following changes were needed:
1. Updated the README.srio-boot-corenet to add descriptions about
boot from PCIE, and change the name to
README.srio-pcie-boot-corenet.
2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
"xxxx_SRIO_PCIE_BOOT", and the image builded with
"xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
from PCIE.
3. Updated other macros and documents if needed to add information
about boot from PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | |
| | | | |
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.
This has the following advantages:
1. No longer need to rebuild an image when change the SRIO port for
boot from SRIO, just rewrite the new RCW with selected port,
then the code will get the port information by reading new RCW.
2. It will be easier to support other boot location options, for
example, boot from PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| |\ \ \ |
|
| | | | |
| | | | |
| | | | |
| | | | | |
Signed-off-by: Alison Wang <b18965@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | | |
Signed-off-by: Alison Wang <b18965@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | | |
Signed-off-by: Alison Wang <b18965@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | | |
Signed-off-by: Alison Wang <b18965@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | | |
Signed-off-by: Alison Wang <b18965@freescale.com>
|
| | | | |
| | | | |
| | | | |
| | | | | |
Signed-off-by: Alison Wang <b18965@freescale.com>
|
| |\ \ \ \ |
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Add support for the onboard eSDHC MMC controller. The hardware on the
MPC8308RDB has the following errata:
- ESDHC111: manual asynchronous CMD12 is broken
- DMA is broken (PIO works)
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
[added include fsl_esdhc header to prevent implicit declarations of
fsl_esdhc_mmc_init() and fdt_fixup_esdhc()]
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.
This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of the TSEC pins.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
This board is the only board that still sticks to OneNAND IPL.
Remove this board, since we have SPL around for a while and
OneNAND is well supported in the SPL framework. The board can
be revived if necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Tom Rini <trini@ti.com>
|
| |/ / / /
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
After removing the Apollon board, remove the OneNAND IPL too.
There are no users for it any more.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <promsoft@gmail.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
|
| |\ \ \ \ |
|
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
This commit enables multibus handling at Samsung's Trats development board.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Heiko Schocher <hs@denx.de>
|
| | | |_|/
| | |/| |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Support for multiple soft I2C buses.
Multibus I2C support is achieved by defining get_multi_{sda|scl}_pin
functions to switch between multiple "soft" I2C buses.
Common definition of I2C_X I2C buses is provided at <i2c.h>.
TEST HW:
Samsung's Exynos4210 evt.0.1 - Trats development board
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Heiko Schocher <hs@denx.de>
|
| |\ \ \ \ |
|