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* Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-201-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* Align end of bss by 4 bytesSelvamuthukumar2008-11-181-0/+1
| | | | | | | | | | Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ppc44x: Unification of virtex5 pp440 boardsRicardo Ribalda Delgado2008-09-051-0/+134
This patch provides an unificated way of handling xilinx v5 ppc440 boards. It unificates 3 different things: 1) Source code A new board called ppc440-generic has been created. This board includes a generic tlb initialization (Maps the whole memory into virtual) and defines board_pre_init, checkboard, initdram and get_sys_info weakly, so, they can be replaced by specific functions. If a new board needs to redefine any of the previous functions (specific initialization) it can create a new directory with the specific initializations needed. (see the example ml507 board). 2) Configuration file Common configurations are located under configs/xilinx-ppc440.h, this header file interpretes the xparameters file generated by EDK and configurates u-boot in correspondence. Example: if there is a Temac, allows CMD_CONFIG_NET Specific configuration are located under specific configuration file. (see the example ml507 board) 3) Makefile Some work has been done in order to not duplicate work in the Main Makefile. Please see the attached code. In order to support new boards they can be implemented in the next way: a) Simple Generic Board (90% of the time) Using EDK generates a new xparameters.h file, replace ppc440-generic/xparameters.h and run make xilinx-ppc440-generic_config && make b) Simple Boards with special u-boot parameters (9 % of the time) Create a new file under configs for it (use ml507.h as example) and change your paramaters. Create a new Makefile paragraph and compile c) Complex boards (1% of the time) Create a new folder for the board, like the ml507 Finally, it adds support for the Avnet FX30T Evaluation board, following the new generic structure: Cheap board by Avnet for evaluating the Virtex5 FX technology. This patch adds support for: - UartLite - 16MB Flash - 64MB RAM Prior using U-boot in this board, read carefully the ERRATA by Avnet to solve some memory initialization issues. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es> Signed-off-by: Stefan Roese <sr@denx.de>
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