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* fsl: Clean up printing of PCI boot infoPeter Tyser2010-11-1416-107/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org
* powerpc/corenet_ds: display the RCW at bootTimur Tabi2010-11-121-0/+15
| | | | | | | | | | | | | | | Display the 64-byte Reset Configuration Word (RCW) during boot, so that there's no confusion as to what RCW U-boot is using. Reset Configuration Word (RCW): 00000000: 4a500000 00000000 18181818 00008888 00000010: 28402400 00002000 fe800000 01200000 00000020: 00000000 00000000 00000000 000b0000 00000030: 00000000 00000000 00000000 00000000 Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* p1_p2_rdb: to set SQW/INT pin of RTC as INT linePriyanka Jain2010-11-121-1/+3
| | | | | | | | | | SQW/INT pin in RTC can be used for generating square wave(by default) or as interrupt line. U-boot is registering this pin for interrupts. Configuring SQW/INT bit as interrupt line during board initialization to avoid spurious interrupts generated by square wave. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mx51evk: support new relocation schemeShawn Guo2010-10-281-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to fix build breakage and support new relocation scheme for mx51evk. - Correct IRAM base address and add size definition The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than 0x1FFE8000 which is for older revision. - Include imx-regs.h in mx51evk.h Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be referred to. - Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE They are used to define init RAM layout. - Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been buried by Wolfgang's commit below 25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
* mx51evk: Fix 2 hours reset issueShawn Guo2010-10-281-4/+4
| | | | | | | | | | | | | | | | | | | The mx51evk u-boot has an issue that system will get reset every 2 hours. MC13892 has an inside charge timer which expires in 120 minutes. If ICHRG and CHGAUTOB are not set properly, this timer expiration will get system power recycled. Since mx51evk has no Li-Ion battery on board, the patch sets ICHRG in externally powered mode and sets CHGAUTOB bit to avoid automatic charging, so that system will not get reset by this timer expiration. The patch also corrects the bit field definition of register 48 (Charger 0) per latest MC13892 Reference Manual. Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
* MX5:use common u-boot.lds of cpu layerJason Liu2010-10-281-1/+0
| | | | | | | | | | | | | | Remove u-boot.lds from mx5 and use the common u-boot.lds of cpu layer. This patch also fix the building errors: arch/arm/cpu/armv7/start.o: In function `_rel_dyn_start_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_start' arch/arm/cpu/armv7/start.o: In function `_rel_dyn_end_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__rel_dyn_end' arch/arm/cpu/armv7/start.o: In function `_dynsym_start_ofs': arch/arm/cpu/armv7/start.S:283: undefined reference to `__dynsym_start' Signed-off-by: Jason Liu <r64343@freescale.com>
* 86xx: Create common linker scriptKumar Gala2010-10-202-265/+0
| | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8641hpcn: Update PCI codePeter Tyser2010-10-201-75/+22
| | | | | | | Update to use the recent, common FSL PCI initialization code. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Adding fixed sdram setting for cornet_ds boardYork Sun2010-10-204-17/+488
| | | | | | | | | | | | | | | 800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram setting. SPD based parameters and fixed parameters can be toggled by hwconfig. To use fixed parameters, hwconfig=fsl_ddr:sdram=fixed To use SPD parameters, hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1 Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Add fdt_fixup_phy_connection helperKumar Gala2010-10-203-15/+12
| | | | | | | Add a common helper that will set the PHY connection type based on enum. We use this on eTSEC, UCC, and will with Fman in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-191-1/+1
|\ | | | | | | | | | | | | | | Conflicts: board/logicpd/imx31_litekit/config.mk boards.cfg Signed-off-by: Wolfgang Denk <wd@denx.de>
| * MX5: rename mx51 to mx5Jason Liu2010-10-181-1/+1
| | | | | | | | | | | | | | Rename mx51 to mx5 in order to support more mx51 like-style SOCs such as MX53 and the followings. Signed-off-by: Jason Liu <r64343@freescale.com>
* | MPC5121: Add USB EHCI supportDamien Dusha2010-10-181-1/+3
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Francesco Rendine <francesco.rendine@valueteam.com> Signed-off-by: Damien Dusha <d.dusha@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Coding style cleanup; slight file restructuring. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
* | config.mk cleanup: drop "-I$(TOPDIR)/board" entriesWolfgang Denk2010-10-181-30/+0
| | | | | | | | | | | | | | | | | | After the recent cleanups, a number of config.mk files consist only of a "PLATFORM_CPPFLAGS += -I$(TOPDIR)/board" entry whih is not needed. Remove such entries. In most cases, that means that the whole config.mk file can be removed. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Makefile: move all Power Architecture boards into boards.cfgWolfgang Denk2010-10-1834-596/+7
| | | | | | | | | | | | | | | | | | | | Clean up Makefile, and drop a lot of the config.mk files on the way. We now also automatically pick all boards that are listed in boards.cfg (and with all configurations), so we can drop the redundant entries from MAKEALL to avoid building these twice. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-1851-77/+79
| | | | | | | | | | | | | | | | | | | | | | | | The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | mkconfig: change CONFIG_MK_ prefix into plain CONFIG_Wolfgang Denk2010-10-184-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When planning for more generalization and Makefile cleanup it became obvious that the introduction of a separate CONFIG_MK_ name space for config options that were set through scripting in the Makefile was not a good idea. Originally the idea was to provide a script-free approach to supply configuration options - there was no real need for a separate name space. But when we now convert the existing Makefile entries to make use of this approach, it would mean that we have to touch a large number of board config files and add #ifdef / #define sequences to "convert" from the CONFIG_MK_ to the CONFIG_ name space. It seems much cleaner to get rid of this somewhat arbitrary _MK string now for the few boards that actually use it. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | mpc83xx: fix 837x MDS PCI HOST buildKim Phillips2010-10-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 6aa3d3bfaa986f1aff5e21a9b9f68d087715b1a9 "83xx: Remove warmboot parameter from PCI init functions" missed one mpc83xx_pcie_init callsite, causing this build error: Configuring for MPC837XEMDS_HOST board... pci.c: In function 'pci_init_board': pci.c:141: error: too many arguments to function 'mpc83xx_pcie_init' this patch extends the commit to include that callsite. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | MPC832XEMDS: fix pci.c build warningWolfgang Denk2010-10-181-3/+0
|/ | | | | | | | | Doubled use of DECLARE_GLOBAL_DATA_PTR caused compile warning: pci.c:71: warning: register used for two global register variables Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-10-171-0/+1
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| * Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-171-0/+1
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| | * mx51evk: add u-boot.imx to ALL targetLoic Minier2010-10-141-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Loic Minier <loic.minier@linaro.org> CC: stefano babic <sbabic@denx.de>
* | | Fix define for MPC5121 ADS board.mark.vels@team-embedded.nl2010-10-131-2/+2
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Originally the Makefile defines CONFIG_ADS5121_REV2 when configuring for board mpc5121ads_rev2. The config in include/configs/mpc5121ads.h expects a define CONFIG_MPC5121ADS_REV2 for this. Therefore there are two defines used but only 1 is defined. This patch renames references to CONFIG_ADS5121_REV2 to CONFIG_MPC5121ADS_REV2 to have one common define. This patch fixes faulty mem size detection caused by wrong config in include/configs/mpc5121ads.h Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-10-112-52/+0
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| * MX51: Drop unused header file for mx51evkStefano Babic2010-09-292-52/+0
| | | | | | | | | | | | | | | | | | As stated in 272017853339f5b9685f9488bdaf5405812d12a4, the mx51evk has not CPLD and all references must be removed. This patch drop a .h file that still remains in board directory. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | fsl: add support for NXID v1 EEPROM formatTimur Tabi2010-10-071-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale application note AN3638 describes an update to the NXID format, which stores MAC addresses and related data on an on-board EEPROM. The new version adds support for up to 23 MAC addresses, instead of just 8. Since the initial implementation of NXID had a "0" in the 'version' field, this new version is called "v1". Boards that are shipped with EEPROMs in the NXID v1 format should define CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Add support for 4th PCI controller on corenet_dsKumar Gala2010-10-071-1/+27
| | | | | | | | | | | | | | We configure the controller but dont have virtual address space thus any devices on the 4th controller are not accessible in u-boot. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fsl: verify writes to the MAC address EEPROMTimur Tabi2010-10-071-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | Update the code which writes to the on-board EEPROM so that it can detect if the write failed because the EEPROM is write-protected. Most of the 8xxx-class Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and similar information. With this patch, if the EEPROM is protected, the "mac save" command will display an error message indicating that the write has not succeeded. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | p1022ds: add audclk hwconfig setting to enable codec reference clockTimur Tabi2010-10-071-9/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants. The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz. Also configure a pin muxing to select some SSI signals, which will disable I2C1. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc8569mds: fix some ddr settingsHaiying Wang2010-10-071-3/+13
| | | | | | | | | | | | | | Enable half drive strength, set RTT to 60Ohm and set write leveling override. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc8569mds: fix consuming long time while relocating code.Haiying Wang2010-10-072-5/+36
| | | | | | | | | | | | | | | | | | | | | | | | The original code maps boot flash as non-cacheable region. When calling relocate_code in flash to copy u-boot from flash to ddr, every loop copy command is read from flash. The flash read speed will be the bottleneck, which consuming long time to do this operation. To resovle this, map the boot flash as write-through cache via tlb. And set tlb to remap the flash after code executing in ddr, to confirm flash erase operation properly done. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | p1022ds: use weak CFI flash accessors when DIU is enabledTimur Tabi2010-09-251-7/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the Freescale P1022, the DIU and the LBC share address pins, which means that when the DIU is active (e.g. the console is on the DVI display), NOR flash cannot be accessed. So we use the weak accessor function feature of the CFI flash code to temporarily switch the pin mux from DIU to LBC whenever we want to read or write flash. This has a significant performance penalty, but it's the only way to make it work. This change allows the 'saveenv' command to work when the video display is enabled. Erasing flash and writing to flash (with the 'cp' command) works, but reading from flash (with the 'md' and 'cp' commands) does not. Also, while flash is being written, the video display will be blank. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | p1022ds: add video supportTimur Tabi2010-09-252-0/+112
| | | | | | | | | | | | | | | | Add support for the DIU controller. If CONFIG_VIDEO is defined, then the console will appear on a DVI monitor instead of the serial port. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | fsl_diu_fb: further refactoring of FSL DIU codeAnatolij Gustschin2010-09-253-123/+51
|/ | | | | | | | Move common code to the fsl_diu_fb.c file and remove obsolete code from board files (aria, mpc8610hpcd and pdm360ng). Move fsl_diu_fb.h file to the include directory. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* 83xx: Remove warmboot parameter from PCI init functionsPeter Tyser2010-09-2311-30/+20
| | | | | | | | | | | | | This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC8308RDB: various clean upsIlya Yanok2010-09-232-46/+5
| | | | | | | | | | | | | | | | | | This patch cleans up the Freescale MPC8308RDB Development board support. Things fixed: - Removed unused PCIE2 definitions from configuration - SICR{L,H} defines used for System I/O Configuration Registers values instead of hardcoding - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of writing to SCCR from the board code - sleep mode stuff removed as MPC8308 has no support for deep sleep and PMCCR1 register. board_early_init_f() removed. - MPC8308 has no ERRATA for DDR controller so workaround removed - 'assignment in if statement' issues solved - use LBLAWAR_* defines instead of hardcoding Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo ↵Timur Tabi2010-09-217-1087/+26
| | | | | | | | | | features The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO). So delete the 8610-specific code and use the built-in features instead. Signed-off-by: Timur Tabi <timur@freescale.com>
* Fix parameters to support RDIMM for P2020DSYork Sun2010-08-311-2/+2
| | | | | Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix SRIO LAW setup on corenet_ds boardsLian Minghuan2010-08-191-22/+25
| | | | | | | | | | | | | In function board_early_init_r(), serdes will not be initialize yet. Thus sRIO was always considered disabled. Move the check for sRIO into misc_init_r() which is called after fsl_serdes_init(). Also, fixed warning associated with gur variable possibly not being used. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Lian Minghuan <B31939@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.york2010-08-191-1/+17
| | | | | | | | | The board specific parameters associated with quad rank dimms where missing. This fixes it so the board will function if quad rank dimms are placed in it. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* net ppc: fix ethernet device names with spacesHeiko Schocher2010-08-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | since commit 1384f3bb8a4f9066805b70c1418eda78ecb73fdd ethernet names with spaces drop a Warning: eth device name has a space! message. This patch fix it for: - "FEC ETHERNET" devices found on mpc512x, mpc5xxx, mpc8xx and mpc8220 boards. renamed to "FEC". - "SCC ETHERNET" devices found on mpc8xx, mpc82xx based boards. Renamed to "SCC". - "HDLC ETHERNET" devices found on mpc8xx boards Renamed to "HDLC" - "FCC ETHERNET" devices found on mpc8260 and mpc85xx based boards. Renamed to "FCC" Tested on the kup4k board. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* powerpc/p4080: Add support for the P4080DS boardKumar Gala2010-08-018-0/+800
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the P4080DS board, with the following features: * 36-bit only * Boots from NOR flash * FMAN drivers NOT supported * SPD DDR initialization Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfigyork2010-07-262-31/+32
| | | | | | | | Enabled SPD Enabled DDR2 Enabled hwconfig Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4york2010-07-261-0/+2
| | | | | | | | | Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual rank with 512MB each rank. Also check dimm size and rank size for memory controller interleaving Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/p2020: Move INIT_RAM_ADDR physical address higher for 36-bit for P2020DSyork2010-07-261-4/+4
| | | | | | | If 36-bit is enabled, move INIT_RAM_ADDR physical address higher to free lowest 4GB address space. Signed-off-by: York Sun <yorksun@freescale.com>
* cmd_usage(): simplify return code handlingWolfgang Denk2010-07-242-8/+4
| | | | | | | | | | | | | | | | Lots of code use this construct: cmd_usage(cmdtp); return 1; Change cmd_usage() let it return 1 - then we can replace all these ocurrances by return cmd_usage(cmdtp); This fixes a few places with incorrect return code handling, too. Signed-off-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliasesKumar Gala2010-07-2011-116/+22
| | | | | | | | | | | Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641Kumar Gala2010-07-202-38/+38
| | | | | | | | The MPC8641 boards actually only have PCIE not PCI. Rename so we are uniform with regards to names so we can replace this code with templated code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.hKumar Gala2010-07-201-2/+2
| | | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on MPC8641 boards since its really PCIE controllers and not PCI. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Move p1022ds slot code into board fileKumar Gala2010-07-161-0/+69
| | | | | | | | The code to map SERDES configs to slot names is board specific and not chip specific. Thus it should live in board/freescale/p1022ds/ and not in arch/powerpc/cpu/. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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