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* mpc83xx: mpc8360emds - fix gcc 4.6 compiler warningKim Phillips2011-11-161-1/+2
| | | | | | | | Configuring for MPC8360EMDS_66_HOST_33 - Board: MPC8360EMDS, Options: CLKIN_66MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 mpc8360emds.c: In function 'board_eth_init': mpc8360emds.c:178:12: warning: array subscript is above array bounds [-Warray-bounds] Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/mpc83xx: Add 512MB DDR support for mpc8360emdsJerry Huang2011-11-031-1/+26
| | | | | | | | | | | | | | | | | The new MPC8360EMDS board supports 512MB DDR since 2008. For 512MB DDR: BAT0 is used for the first 256MB memory, BAT4 is used for the second 256MB memory and the address space of SDRAM follows the DDR, so if the size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of DDR is 512MB, the BAT4 will be used for the second 256MB memory and there is no BAT for SDRAM. Therefore, if the size of DDR is 512MB, this patch will use BAT6 for SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the codes relocates to the DDR. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds codeJoe Hershberger2011-11-031-16/+26
| | | | | | | | | | | | | Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring Cleanup the setting of the csnbds to respect the setting of CONFIG_SYS_DDR_SDRAM_BASE Use __ilog2 instead of writing the code to compute it Disable unused CS configs Ensure ddrlaw.bar is configured Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* fsl: Change fsl_phy_enet_if to phy_interface_tAndy Fleming2011-04-201-4/+6
| | | | | | | | | | | | The fsl_phy_enet_if enum was, essentially, the phy_interface_t enum. This meant that drivers which used fsl_phy_enet_if to deal with PHY interfaces would have to convert between the two (or we would have to have them mirror each other, and deal with the ensuing maintenance headache). Instead, we switch all clients of fsl_phy_enet_if over to phy_interface_t, which should become the standard, anyway. Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Detlev Zundel <dzu@denx.de>
* powerpc/8xxx: Add fdt_fixup_phy_connection helperKumar Gala2010-10-201-9/+6
| | | | | | | Add a common helper that will set the PHY connection type based on enum. We use this on eTSEC, UCC, and will with Fman in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-161-3/+3
| | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 83xx, uec: split enet_interface in two variablesHeiko Schocher2010-01-311-1/+2
| | | | | | | | | | | | There's no sensible reason to unite speed and interface type into one variable. So split this variable enet_interface into two vars: enet_interface_type, which hold the interface type and speed. Also: add the possibility for switching between 10 and 100 MBit interfaces on the fly, when running in FAST_ETH mode. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* mpc83xx: mpc8360emds: Add QE USB device tree fixupsAnton Vorontsov2009-09-251-0/+12
| | | | | | | | With this patch we can change QE USB mode without need to hand-edit the device tree. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUsAnton Vorontsov2009-09-251-6/+50
| | | | | | | | | This patch fixes various ethernet issues with gigabit links handling in U-Boot. The workarounds originally implemented by Kim Phillips for Linux kernel. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is availableAnton Vorontsov2009-09-251-1/+4
| | | | | | | | | | | | | | | Since commit 5c2ff323a94e27e481f70c44838d43fcd844dd46 ("mpc8360emds: rework LBC SDRAM setup"), LBC SDRAM is available for use in Linux. Though, it appears that QE Ethernet in Gigabit mode can't transmit large packets when it tries to work with a data in LBC SDRAM (memtest didn't discover any issues, is LBC SDRAM just too slow?). With this patch we can still use the board without DDR memory, but if DDR is available, we don't use LBC SDRAM. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* 83xx: Replace CONFIG_ECC_INIT_VIA_DDRC referencesPeter Tyser2009-07-021-2/+2
| | | | | | | | | | Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures use Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Make Freescale local bus registers available for both 83xx and 85xx.Haiying Wang2008-10-291-1/+1
| | | | | | | | | | | | | - Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it can be shared by both 83xx and 85xx - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards files which use lbus83xx_t. - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that 85xx can share them. Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* mpc83xx: mpc8360emds: rework LBC SDRAM setupAnton Vorontsov2008-10-211-12/+27
| | | | | | | | | | | | | | | | | | | Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes it difficult to use (b/c then the memory is discontinuous and there is quite big memory hole between the DDR/SDRAM regions). This patch reworks LBC SDRAM setup so that now we dynamically place the LBC SDRAM near the DDR (or at 0x0 if there isn't any DDR memory). With this patch we're able to: - Boot without external DDR memory; - Use most "DDR + SDRAM" setups without need to support for sparse/discontinuous memory model in the software. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-42/+42
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Change initdram() return type to phys_size_tBecky Bruce2008-06-121-1/+1
| | | | | | | | | | | | | | | | | | | This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) codeKim Phillips2008-03-281-7/+4
| | | | | | | | | | in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6, 85xx's "Update SVR numbers to expand support", simplify SPRIDR processing and processor ID display. Add REVID_{MAJ,MIN}OR macros to make REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR convenience macros. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Remove erroneous or extra spd.h #includers.Jon Loeliger2008-03-051-4/+0
| | | | | | | | | | Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* mpc83xx: clean up mpc8360emds.c warningsKim Phillips2008-01-161-7/+7
| | | | | | | | | | | | mpc8360emds.c: In function 'ft_board_setup': mpc8360emds.c:327: warning: assignment makes pointer from integer without a cast mpc8360emds.c:329: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast mpc8360emds.c:334: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast mpc8360emds.c:341: warning: assignment makes pointer from integer without a cast mpc8360emds.c:343: warning: passing argument 2 of 'fdt_getprop' makes integer from pointer without a cast mpc8360emds.c:348: warning: passing argument 2 of 'fdt_setprop' makes integer from pointer without a cast Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: fix phy-connection-type fixup codeKim Phillips2008-01-161-9/+15
| | | | | | | | | use tree passed to us in local blob, not global fdt. Also use fdt_path_offset to convert to relative offset, since absolute reference is needed to check for rgmii-id mode string value. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: remove FLAT_TREE codeKim Phillips2008-01-081-13/+2
| | | | | | need to rm it from pci code, too! Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: convert to using do_fixup_*()Kim Phillips2008-01-081-17/+24
| | | | | | | | | convert to using simpler mpc85xx style fdt update code; streamline by eliminating macros OF_SOC, OF_CPU, etc. which allows us to rm the old school FLAT_TREE code from 83xx (since the sbc8349 was just converted over to using libfdt). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: supress compiler warningKim Phillips2008-01-081-1/+1
| | | | | | | | mpc8360emds.c: In function ‘ft_board_setup’: mpc8360emds.c:335: warning: assignment discards qualifiers from pointer target type mpc8360emds.c:345: warning: assignment discards qualifiers from pointer target type Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: fix remaining fdt_find_node_by_path referencesKim Phillips2008-01-081-2/+2
| | | | | | rename to fdt_path_offset Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: mpc8360 rev.2.1 erratum 2: replace rgmii-id with rgmii-rxidKim Phillips2008-01-081-0/+31
| | | | | | | | u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type properties in the device tree so the PHY gets configured for internal delay on RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* MPC8360E-MDS: configure and enable second UARTAnton Vorontsov2008-01-081-0/+8
| | | | | | | Despite user manual, BCSR9.7 is negated (high) on HRST, so UART2 is disabled. Fix that and configure QE pins properly. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* mpc83xx: move freescale boards to boards/freescaleKim Phillips2007-08-161-0/+313
includes build fixes. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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