| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | board/b4860qds:Slow MDC clock to comply IEEE specs in PBI config | Prabhakar Kushwaha | 2014-04-22 | 1 | -0/+3 |
| | | | | | | | | | | | The MDC generate by default value of MDIO_CLK_DIV is too high i.e. higher than 2.5 MHZ. It violates the IEEE specs. So Slow MDC clock to comply IEEE specs Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> | ||||
| * | powerpc/B4860: enable PBL tool for B4860 | Shaohui Xie | 2013-10-16 | 1 | -0/+27 |
| Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a pbl boot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> | |||||
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index : blackbird-obmc-uboot | |
| Blackbird™ U-Boot sources for OpenBMC | Raptor Computing Systems |
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