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* [PPC440SPe] Improve PCIe configuration space accessGrzegorz Bernacki2007-09-071-6/+6
| | | | | | | | | | | | | - correct configuration space mapping - correct bus numbering - better access to config space Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the first device on the first bus. We now allow to configure up to 16 buses; also, scanning for devices behind the PCIe-PCIe bridge is supported, so peripheral devices farther in hierarchy can be identified. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* ppc4xx: Change SysACE address on KatmaiStefan Roese2007-04-021-1/+1
| | | | | | | | With this new base address of the Xilinx SystemACE controller the Linux driver will be easier to adapt, since it can now be mapped via the "normal" ioremap() call. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Small AMCC Katmai 440SPe updateStefan Roese2007-03-081-0/+10
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Add support for the AMCC Katmai (440SPe) eval boardStefan Roese2007-02-201-0/+108
Signed-off-by: Stefan Roese <sr@denx.de>
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