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* x86: use actual CPU number for allocating memoryMiao Yan2016-01-131-3/+3
| | | | | | | | | | Use actual CPU number, instead of maximum cpu configured, to allocate stack memory in 'load_sipi_vector' Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: fix a typo in function nameMiao Yan2016-01-131-3/+3
| | | | | | | | | Rename 'find_cpu_by_apid_id' to 'find_cpu_by_apic_id'. This should be a typo. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: add a cpu uclass driver for qemu targetMiao Yan2016-01-134-5/+62
| | | | | | | | | | | | | | | Add a cpu uclass driver for qemu. Previously, the qemu target gets cpu number from board dts files, which are manually created at compile time. This does not scale when more cpus are assigned to guest as the dts files must be modified as well. This patch adds a cpu uclass driver for qemu targets to directly read online cpu number from firmware. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: qemu: add fw_cfg supportMiao Yan2016-01-134-1/+380
| | | | | | | | | | | | | The QEMU fw_cfg interface allows the guest to retrieve various data information from QEMU. For example, APCI/SMBios tables, number of online cpus, kernel data and command line, etc. This patch adds support for QEMU fw_cfg interface. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: ivybridge: Add macros for LPC decode rangesBin Meng2016-01-131-0/+10
| | | | | | | | Add several macros for LPC decode registers on PCH. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Always use hex numbers in the hob command outputBin Meng2016-01-131-2/+2
| | | | | | | | | In the 'fsp hob' command output, decimal numbers and hexadecimal numbers are used mixedly. Now change to always use hex numbers to keep consistency. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: ivybridge: Do not require HAVE_INTEL_MEBin Meng2016-01-131-1/+0
| | | | | | | | | Do not set HAVE_INTEL_ME by default as for some cases Intel ME firmware even does not reside on the same SPI flash as U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: ivybridge: Add microcode blobs for all the steppingsBin Meng2016-01-134-0/+2472
| | | | | | | | | | | This adds microcode blobs created from Intel FSP package for the Chief River platform. They are for all the Ivy Bridge steppings: 306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the 306a9 which is already in the U-Boot tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Set up init runtime buffer in update_fsp_configs()Bin Meng2016-01-134-9/+18
| | | | | | | | | fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Move struct fspinit_rtbuf definition to chipset headerBin Meng2016-01-134-16/+8
| | | | | | | | | | | | | All FSP spec v1.0 complaint FSP binary uses struct fspinit_rtbuf as defined by the 1.0 spec, however there are FSPs that does not follow 1.0 spec (possible due to that FSP predates the 1.0 spec), and future FSP binary that is complaint to v1.1 spec defines an optional paltform-specific runtime data in the struct fspinit_rtbuf. Hence move the definition to chipset header. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: queensbay: Remove invalid comments in update_fsp_configs()Bin Meng2016-01-131-6/+0
| | | | | | | | Those comments in update_fsp_configs() are not correct. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Introduce CONFIG_FSP_USE_UPD Kconfig optionBin Meng2016-01-132-9/+23
| | | | | | | | | | Not every FSP supports UPD, thus we introduce a Kconfig option CONFIG_FSP_USE_UPD and use it to wrap these common UPD handling codes in fsp_support.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Rename update_fsp_upd() and change its signatureBin Meng2016-01-134-12/+13
| | | | | | | | | | | To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Rename shared_data to fsp_config_dataBin Meng2016-01-135-12/+46
| | | | | | | | | | | | FSP has several config data like UPD, HDA verb table which can be overridden or provided by bootloader. Currently in U-Boot only UPD is handled via struct shared_data. To accommodate any platform, we rename shared_data to fsp_config_data and move the definition from common place fsp_support.h to platform-specific place fsp_configs.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Add boot_mode as a member of struct shared_dataBin Meng2016-01-132-0/+2
| | | | | | | | Save boot_mode in struct shared_data for future refactoring. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Avoid cast stack_top in struct shared_dataBin Meng2016-01-133-4/+4
| | | | | | | | | Declare stack_top as u32 in struct shared_data and struct common_buf so that we can avoid casting in fsp_init(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* x86: fsp: Simplify fsp_continue()Bin Meng2016-01-132-26/+7
| | | | | | | | | There is no need to pass shared_data to fsp_continue() so we can remove unnecessary codes that simplifies the function a lot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* am33xx/am43xx: Add platform data for GPIOsTom Rini2016-01-081-0/+23
| | | | | | | | | | | | | On these platforms we have many cases of boards that enable device model and GPIO support but do not enable OF_CONTROL and pass in a device tree with the binary. We need to bring in the platform data here as well. Tested on Beaglebone Black. Reported-by: Robert Nelson <robertcnelson@gmail.com> Reported-by: Francisco Aguerre <franciscoaguerre@gmail.com> Reported-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* powerpc: Various typo fixes under arch/powerpc/cpu/mpc83xxRobert P. J. Day2016-01-086-20/+20
| | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* test: add sandbox timer to test.dtsThomas Chou2016-01-071-0/+5
| | | | | | | | Add missing sandbox timer to test.dts, so that test-dm works. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-01-071-0/+2
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| * powerpc, mpc5xxx: fix missing bootflag initHeiko Schocher2016-01-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | since: commit: f05ad9ba "Add a way to skip relocation" tqm5200s board fails to boot. Reason is that board_init_f has a function parameter bootflag, which is not setup in in arch/powerpc/cpu/mpc5xxx/start.S _start So board_init_f gets a undefined bootflag, currently the gd pointer address. Unfortunately this address sets the GD_FLG_SKIP_RELOC bit, so u-boot code gets not relocated and u-boot does not boot ... Init bootflag with 0, and tqm5200 boots fine again. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-036-5/+50
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| * imx_common: check for Serial Downloader in spl_boot_deviceStefano Babic2016-01-031-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for bmode before reading the boot device to check if a serial downloader is started, and returns UART if the serial downloader is set, letting SPL to wait for an image if CONFIG_SPL_YMODEM_SUPPORT is set. This allows to load again a SPL based board with imx_usb_loader together with a tool such as kermit. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Eric Nelson <eric@nelint.com> Tested-by: Eric Nelson <eric@nelint.com>
| * ARM: mxs: allow boards to select DC-DC switching clock sourceMichael Heimpold2016-01-032-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some board designs, it might be useful to switch the DC-DC clock source to something else rather the default 24 MHz, e.g. for EMI reasons. For this, override the mxs_power_setup_dcdc_clocksource function in your board support files. Example: void mxs_power_setup_dcdc_clocksource(void) { mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ); } Signed-off-by: Michael Heimpold <mhei@heimpold.de> Cc: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * imx: ddr: drop duplicated debug infoPeng Fan2016-01-031-1/+0
| | | | | | | | | | | | | | Drop duplicated debug info for tcl. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx: mx6: fix reg base address when runtime usagePeng Fan2015-12-071-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Should use parenthese to wrap the macro definition, otherwise we will encounter error like the following: " if (base_addr != LCDIF1_BASE_ADDR) { puts("Wrong LCD interface!\n"); return -EINVAL; } " Without this patch, we will always encounter "Wrong LCD interface". Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * imx: mx6: add missing return valueJeroen Hofstee2015-12-071-0/+2
| | | | | | | | | | | | | | cc: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-12-244-3/+22
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: include/configs/axs101.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * | arm: socfpga: Unreset NAND in U-BootMarek Vasut2015-12-221-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Make sure the NAND reset is not asserted in full U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | arm: socfpga: Unreset NAND in SPLMarek Vasut2015-12-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | If the system boots from NAND, make sure to de-assert the NAND IP reset, otherwise the system will get stuck. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Define NAND reset bitMarek Vasut2015-12-221-1/+2
| | | | | | | | | | | | | | | | | | | | | Define the NAND reset bit and fix the ordering of the macros. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Make /soc available in pre-relocMarek Vasut2015-12-221-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This node must be available before relocation, otherwise the board will not find mmc and will thus not boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Actually enable L2 cacheMarek Vasut2015-12-221-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | The L2 cache was never enabled in the v7_outer_cache_enable(), fix this and enable the L2 cache. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | | ARM: dts: uniphier: add SD/MMC pinmux nodesMasahiro Yamada2015-12-231-0/+15
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: set DTB file name to fdt_file environmentMasahiro Yamada2015-12-231-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we want to boot Linux with a DTB file downloaded from a TFTP server or somewhere, we need to know the file name to be downloaded. Assume the U-Boot configuration is shared among some similar boards. If they are similar enough, the difference only appears in device trees. The build procedure would be like this: - Board A: make foo_common_defconfig && make DEVICE_TREE=foo_board_a - Board B: make foo_common_defconfig && make DEVICE_TREE=foo_board_b - Board C: make foo_common_defconfig && make DEVICE_TREE=foo_board_c In this case, the U-Boot image contains nothing about the DTB file name it is running with. (CONFIG_DEFAULT_DEVICE_TREE is not helpful for this purpose because it is painful to change it from "make menuconfig" for each board.) This commit allows to lookup the DTB file name based on the compatible string and set it to "fdt_file" environment. Then "tftpboot $fdt_file" will download the file we want. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: merge umc/ and ddrphy/ into a single directoryMasahiro Yamada2015-12-2311-15/+11
| | | | | | | | | | | | | | | | | | | | | | | | The UMC (Universal Memory Controller) and the DDR PHY block are highly related to each other. It is better to have both code in the same directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: display model number all the time on boot upMasahiro Yamada2015-12-231-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Both "Model 1" and "Model 2" are supported for ProXstream2 and PH1-LD6b boards. It is useful to show the model number in the boot banner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: add macros and revision IDs for sLD11 and LD10Masahiro Yamada2015-12-233-1/+27
| | | | | | | | | | | | | | | | | | These are new SoCs from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: compile uniphier_get_board_param() for U-Boot properMasahiro Yamada2015-12-231-1/+1
| | | | | | | | | | | | | | | | | | | | | Compile this file for U-Boot proper as well as SPL, so that the U-Boot proper can call uniphier_get_board_param(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: split ProXstream2 board data and change DDR frequencyMasahiro Yamada2015-12-231-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DDR3 memory chips on ProXstream2 boards support up to 2133 MHz, while only up to 1866MHz on PH1-LD6b boards. Split the board data structure and change the DDR frequency of ProXstream2 boards to 2133 MHz. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: call uniphier_get_board_param() without FDT blobMasahiro Yamada2015-12-233-6/+7
| | | | | | | | | | | | | | | | | | | | | Move "gd->fdt_blob" from the caller to the callee so that this function can be used more easily. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: add functions to get SoC model/revisionMasahiro Yamada2015-12-232-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We sometimes have to implement different code depending on the SoC revision. This commit adds functions to get the model/revision number. Note: Model number: incremented on major changes of the SoC Revision number: incremented on minor changes of the SoC The "Model 2" exists for PH1-sLD3, ProXstream2/PH1-LD6b. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: dts: uniphier: use stdout-path instead of consoleMasahiro Yamada2015-12-238-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | Sync device trees with Linux. Linux commit: 06ff6b2d63210922a1b1d0f4997e29ce75b5e0c0 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: dts: uniphier: add outer cache nodesMasahiro Yamada2015-12-235-7/+84
| | | | | | | | | | | | | | | | | | | | | These nodes are not parsed by U-Boot for now, but syncing device trees with Linux is helpful for easier diffing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsiMasahiro Yamada2015-12-236-881/+616
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UniPhier SoCs (except PH1-sLD3) have several nodes in common. Factor out them into uniphier-common32.dtsi. This improves the code maintainability. PH1-sLD3 is so old that it has more or less different register maps than the others. So, it cannot be included in this refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: allow DDR function to return more precise error codeMasahiro Yamada2015-12-231-2/+3
| | | | | | | | | | | | | | | | | | | | | Return different error code depending on the reason so that the caller can know the cause of the failure. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: use BIT() macro for DDR PHY headerMasahiro Yamada2015-12-231-45/+46
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: rename DTCR_RNKEN_* register bit to DTCR_RANKEN_*Masahiro Yamada2015-12-232-4/+4
| | | | | | | | | | | | | | | | | | | | | The bit 27-24 of the DTCR register is described as RANKEN in the DDR PHY databook. Follow this abbreviation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: add const qualifier to constant arrayMasahiro Yamada2015-12-231-1/+1
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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