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* x86: Convert board_init_f_r to a processing loopGraeme Russ2012-01-045-125/+206
| | | | | | | | | | | | | | Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
* x86: Split init functions out of board.cGraeme Russ2012-01-046-221/+438
| | | | | | This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
* x86: Move relocation code out of board.cGraeme Russ2012-01-043-67/+118
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* x86: Move setup_pcat_compatibility() out of board.cGraeme Russ2012-01-042-7/+7
| | | | | | | | | This function simply does not belong in board.c -- Changes for v2: - Added commit message
* x86: Move do_go_exec() out of board.cGraeme Russ2012-01-043-27/+65
| | | | | | -- Changes for v2: - None
* CHECKPATCH: arch/x86/lib/*Graeme Russ2012-01-042-73/+122
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* x86: Tweak IDT and GDT for alignment and readabilityGraeme Russ2012-01-042-13/+46
| | | | | | -- Changes for v2: - Renamed to better reflect nature of changes
* x86: Allow cache before copy to RAMGraeme Russ2012-01-041-5/+10
| | | | | | -- Changes for v2: - None
* x86: Create weak init_cache() and default enable_caches() functionsGraeme Russ2012-01-043-3/+17
| | | | | | -- Changes for v2: - Tweaked commit title
* x86: Set GD_FLG_RELOC after entering in-RAM copy of U-BootGraeme Russ2012-01-041-2/+2
| | | | | | -- Changes for v2: - None
* x86: Use fs for global dataGraeme Russ2012-01-046-47/+94
| | | | | | | | | | | | | | | | | | | | | | Use the base address of the 'F' segment as a pointer to the global data structure. By adding the linear address (i.e. the 'D' segment address) as the first word of the global data structure, the address of the global data relative to the 'D' segment can be found simply, for example, by: fs movl 0, %eax This makes the gd 'pointer' writable prior to relocation (by reloading the Global Desctriptor Table) which brings x86 into line with all other arches NOTE: Writing to the gd 'pointer' is expensive (but we only do it twice) but using it to access global data members (read and write) is still fairly cheap -- Changes for v2: - Rebased against changes made to patch #3 - Removed extra indent - Tweaked commit message
* x86: Rework relocation calculationsGraeme Russ2012-01-041-12/+11
| | | | | | | | | | This commit introduces no functional changes - It simply re-arranges the calculations so that adding to them in future commits will be cleaner -- Changes for v2: - Fixed typo in title - Added commit message
* x86: Simplify Flash-to-RAM code execution transitionGraeme Russ2012-01-043-19/+30
| | | | | | | | | | | Move the relocation offset calculation out of assembler and into C. This also paves the way for the upcoming init sequence simplification by adding the board_init_f_r flash to RAM transitional function -- Changes for v2: - Added commit message - Minor adjustment to new stack address comment
* x86: Rework Global Descriptor Table loadingGraeme Russ2012-01-041-29/+53
| | | | | | | | | | | | The inline assembler is ugly and uses hard coded magic numbers. Make it more elegant to allow cleaner implementation of future GDT related patches. The compiler seems smart enough to generate the same code anyway -- Changes for v2: - Rebased against revised patch #3 - Use GDT size define instead of magic number - Added commit message
* x86: Remove GDR related magic numbersGraeme Russ2012-01-043-9/+25
| | | | | | | | -- Changes for v2: - Use an enum - Add defined for GDT size (previously added in patch 7) - Use X86_ namespace (as per Linux headers)
* x86: Speed up copy-to-RAM and clear BSS operationsGraeme Russ2012-01-041-12/+5
| | | | | | | | | The implementations of memcpy and memset are now the optimised versions from glibc, so use them instead of simple copy loops -- Changes for v2: - Removed unneeded brackets
* x86: Import glibc memcpy implementationGraeme Russ2012-01-022-1/+62
| | | | | | | | Taken from glibc version 2.14.90 -- Changes for v2: - None
* Merge branch 'next' of ../nextWolfgang Denk2011-12-2314-128/+1011
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of ../next: mkenvimage: Add version info switch (-V) mkenvimage: Fix getopt() error handling mkenvimage: Fix some typos phy: add Micrel KS8721BL phy definition net: introduce per device index mvgbe: remove setting of ethaddr within the driver x86: Add support for specifying an initrd with the zboot command x86: Refactor the zboot innards so they can be reused with a vboot image x86: Add infrastructure to extract an e820 table from the coreboot tables x86: Add support for booting Linux using the 32 bit boot protocol x86: Clean up the x86 zimage code in preparation to extend it x86: Import code from coreboot's libpayload to parse the coreboot table x86: Initial commit for running as a coreboot payload CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/voh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/voh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/hh405/fpgadata.c CHECKPATCH: ./board/esd/pci405/fpgadata.c CHECKPATCH: ./board/esd/tasreg/fpgadata.c CHECKPATCH: ./board/esd/apc405/fpgadata.c CHECKPATCH: ./board/esd/voh405/fpgadata.c CHECKPATCH: ./board/esd/ash405/fpgadata.c CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c CHECKPATCH: ./board/esd/ar405/fpgadata.c CHECKPATCH: ./board/esd/plu405/fpgadata.c CHECKPATCH: ./board/esd/wuh405/fpgadata.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c CHECKPATCH: ./board/esd/canbt/fpgadata.c CHECKPATCH: ./board/esd/du405/fpgadata.c CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c avr32:mmu.c: fix printf() length modifier fat.c: fix printf() length modifier cmd_sf.c: fix printf() length modifier Make printf and vprintf safe from buffer overruns vsprintf: Move function documentation into header file Add safe vsnprintf and snprintf library functions Move vsprintf functions into their own header Conflicts: tools/mkenvimage.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * x86: Add support for specifying an initrd with the zboot commandGabe Black2011-12-191-4/+19
| | | | | | | | | | | | | | | | | | | | | | This change finishes plumbing the initrd support built into the zboot mechanism out to the command interface. It also fixes a bug in the command declaration where the kernel size could be passed as an optional second parameter but not enough arguments were allowed. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Refactor the zboot innards so they can be reused with a vboot imageGabe Black2011-12-193-90/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If vboot successfully verifies a kernel, it will leave it in place and basically ready to boot. The zeropage table which is part of the x86 boot protocol is at the end of the kernel, though, instead of the beginning, and because the image is already in place there's no need to copy it around. This change refactors the code which implements the zboot command so that the configuration of the zeropage table and loading the pieces of the kernel into memory are done separately. Also, because the command line goes before the zeropage table in vboot which is somewhat incompatible with the normal protocol, where to put the command line is a now a parameter instead of being hard coded. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add infrastructure to extract an e820 table from the coreboot tablesGabe Black2011-12-191-1/+37
| | | | | | | | | | | | | | | | Also approximate the size of RAM using the largest RAM address available in the tables. There may be areas which are marked as reserved which are actually at the end of RAM. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add support for booting Linux using the 32 bit boot protocolGabe Black2011-12-193-17/+62
| | | | | | | | | | | | | | | | | | This change conditionally modifies the zboot command so that it can use the 32 bit boot protocol. This is necessary because the 16 bit realmode entry point assumes that it can call BIOS services which neither coreboot nor u-boot provide. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Clean up the x86 zimage code in preparation to extend itGabe Black2011-12-192-58/+45
| | | | | | | | | | | | | | | | This change cleans up some formatting issues in the zimage handling code, and converts it from using offsets added to a base pointer to using the available structure definitions which were already being included. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Import code from coreboot's libpayload to parse the coreboot tableGabe Black2011-12-197-0/+620
| | | | | | | | | | | | | | | | | | | | | | | | | | This change also forces the lib_sysinfo structure to be in the .data section. Otherwise it ends up in the .bss section. U-boot assumes that it doesn't need to copy it over during relocation, and instead fills that whole section with zeroes. If we really were booting from ROM that would be appropriate, but we need some information from the coreboot tables (memory size) before then and have to fill that structure before relocation. We skirt u-boot's assumption by putting this in .data where it assumes there is still read only but non-zero data. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Initial commit for running as a coreboot payloadGabe Black2011-12-194-0/+148
| | | | | | | | | | | | | | | | Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * avr32:mmu.c: fix printf() length modifierAndreas Bießmann2011-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | avr32 uses unsigned long addresses, fix the printf() length modifier for that fact. Before this patch following warning occours: ---8<--- mmu.c: In function 'mmu_init_r': mmu.c:25: warning: format '%08x' expects type 'unsigned int', but argument 2 has type 'uintptr_t' --->8--- Signed-off-by: Andreas Bießmann <biessmann@corscience.de> cc: Mike Frysinger <vapier@gentoo.org> cc: Thomas Chou <thomas@wytron.com.tw> cc: Reinhard Meyer <u-boot@emk-elektronik.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | arm: Tegra: fix undefined instruction hang immediately after resetTom Warren2011-12-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | commit 0d479b53 (Aneesh V) added code for OMAP4 that doesn't execute on Tegra, due to the AVP (ARM7TDI) not having a CP15. Result was an undefined instruction hang just after reset. Signed-off-by: Tom Warren <twarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Aneesh V <aneesh@ti.com>
* | AVR32: fix timer_init() functionSven Schnelle2011-12-201-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | timer_init() now returns an int (the error code) instead of void. This makes compilation fail with: interrupts.c:111: error: conflicting types for 'timer_init' /home/svens/u-boot/u-boot/include/common.h:246: error: previous declaration of 'timer_init' was here make[1]: *** [interrupts.o] Error 1 Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | arm, fdt: update ethernet mac address before booting LinuxHeiko Schocher2011-12-191-0/+2
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Gerald van Baren <gvb.uboot@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de>
* | add print_cpuinfo to s3c24x0David Müller (ELSOFT AG)2011-12-192-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | Hello This patch adds support for "print_cpuinfo" on Samsung s3c24x0 based targets. If activated by "#define CONFIG_DISPLAY_CPUINFO", the chip ID and the 3 main cpu frequencies will be displayed. Dave Signed-off-by: David Müller <d.mueller@elsoft.ch>
* | omap4_panda: Initialize the USB phyChris Lalancette2011-12-191-0/+63
| | | | | | | | | | | | | | | | | | | | During misc_init_r, make sure to setup the clocks properly for the USB hub on the pandaboard. With this in place, the USB hub and the ethernet works on the pandaboard. Signed-off-by: Chris Lalancette <clalancette@gmail.com> Acked-by: Aneesh V <aneesh@ti.com>
* | davinci: Fixed wrong timebase clock frequency.Manfred Rudigier2011-12-191-1/+1
| | | | | | | | Signed-off-by: Manfred Rudigier <manfred.rudigier@omicron.at>
* | arm926ejs: remove noop flush_dcache_all functionIlya Yanok2011-12-191-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 2f3427c added noop cache functions implementation for arm926ejs to fix compilation of drivers depending on these functions (DaVinci EMAC in particular). Unfortunately, the bug was introduced: noop implementation calls dcache_disable which calls flush_dcache_all which in turn calls dcache_disable thus creating an infinite loop. This patch removes noop implementation for flush_dcache_all, we already have default one in arch/arm/lib/cache.c and it should be used instead. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Tested-by: Matthias Weisser <weisserm@arcor.de>
* | Coding Style cleanupWolfgang Denk2011-12-192-2/+1
|/ | | | | | | Fix trailing white space, indentation by spaces instead of TABs, excessive blank lines, trailing blank lines. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2011-12-171-0/+1
|\ | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-usb: USB: Use (get|put)_unaligned for accessing wMaxPacketSize usb:gadget:s5p Enable the USB Gadget framework at Exynos4210 (C210 Universal) README: add documentation for CONFIG_USB_ULPI* USB: ULPI: increase error case verbosity USB: ULPI: clean a mixup of return types USB: ULPI: switch argument type from u8 to unsigned
| * usb:gadget:s5p Enable the USB Gadget framework at Exynos4210 (C210 Universal)Lukasz Majewski2011-12-161-0/+1
| | | | | | | | | | | | | | | | | | | | This commit enables support for USB Gadgets on the Exynos4210 (C210 Universal) reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> CC: Remy Bohmer <linux@bohmer.net>
* | powerpc/mpc83xx: set TXEQA/TXEQE value for mpc837XE sataJerry Huang2011-12-121-1/+10
|/ | | | | | | | | | | | In the current u-boot code, the value of these fields are the reserved value (0b100), through the signal integrity measurement on freescale's board with these reserved setting, the signal eye is out of the recommended spec for non-transition amplitude at 500mV nominal. According to the errata for MPC8379E, we should make a change to the recommended setting from essentially nothing at this time to 0b001 for SATA. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/bootm: Flush ramdisk and device tree image when booting on MPKumar Gala2011-12-121-6/+16
| | | | | | | | | | | | | We already flush the kernel image after we've loaded it to ensure visiblity to the other cores. We need to do the same thing for the ramdisk and device tree images. In AMP boot scenarios we might not be HW cache coherent with the secondary core that we are loading and setting the ramdisk and device tree up for. Thus we need to ensure we've flushed the regions of memory utilized by ramdisk and device tree so the loadding and any modifications (from decompression or fdt updates) are made visible to the secondary cores. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2011-12-126-7/+93
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-usb: USB: efikamx: Enable USB on EfikaMX and EfikaSB USB: Add generic ULPI layer and a viewport USB: EHCI: Allow EHCI post-powerup configuration in board files USB: mx51evk: add end enable USB host support on port 1 USB: mx53loco: add end enable USB host support on port 1 USB: MX5: Add MX5 usb post-init callback USB: MX5: Abstract out mx51 USB pixmux configuration USB: MX5: add generic USB EHCI support for mx51 and mx53 USB: MX5: add helper functions to enable USB clocks usb:gadget:s5p Enable the USB Gadget framework at GONI usb:gadget:s5p USB Device Controller (UDC) implementation ehci: speed up initialization usb: add help for missing start subcommand cosmetic: remove excess whitespace from usb command help usb: align usb_endpoint_descriptor to 16-bit boundary usbtty: init endpoints prior to startup events pxa: convert pxa27x_udc to use read and write functions pxa: activate the first usb host port on pxa27x by default pxa: fix usb host register mismatch ehci-fsl: correct size of ehci caplength USB: Add usb_event_poll() to get keyboards working with EHCI USB: gadaget: add Marvell controller support USB: Fix complaints about strict aliasing in OHCI-HCD USB: Drop dead code from usb_kbd.c USB: Rework usb_kbd.c USB: Add functionality to poll the USB keyboard via control EP
| * USB: MX5: add helper functions to enable USB clocksWolfgang Grandegger2011-12-113-0/+80
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com> V2: Fix spacing in crm_regs.h
| * usb:gadget:s5p Enable the USB Gadget framework at GONILukasz Majewski2011-12-111-0/+4
| | | | | | | | | | | | | | | | | | | | This commit enables support for USB Gadgets on the GONI reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Remy Bohmer <linux@bohmer.net>
| * pxa: convert pxa27x_udc to use read and write functionsStefan Herbrechtsmeier2011-12-111-4/+4
| | | | | | | | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
| * pxa: activate the first usb host port on pxa27x by defaultStefan Herbrechtsmeier2011-12-111-2/+2
| | | | | | | | | | | | | | | | The pxa27x has 3 usb host ports. Activate all by default. Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
| * pxa: fix usb host register mismatchStefan Herbrechtsmeier2011-12-112-1/+3
| | | | | | | | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-12-121-0/+4
|\ \ | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: arm: add __aeabi_unwind_cpp_pr1() function to avoid linker complaints post: fix compile issue for post tests on kirkwood
| * | arm: add __aeabi_unwind_cpp_pr1() function to avoid linker complaintsWolfgang Grandegger2011-12-111-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the ELDK 5.1 (beta) "armv7a" toolchain I'm get the following build failure: $ ./MAKEALL mx51evk ... /opt/eldk-5.1/armv7a/sysroots/arm-linux-gnueabi/usr/lib/arm-linux- gnueabi/4.6.1/libgcc.a(bpabi.o):(.ARM.exidx+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' make: *** [u-boot] Error 1 This patch fixes the issue similar to commit d442b6e7ad6a86e2fd0e6297291fe8872ff26fc6 but I don't know if it's general enough or if it does harm when using other toolchains. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* | sandbox: fix compiling of cpu/os.cAndreas Bießmann2011-12-101-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-boot itself generally builds with -nostdinc. This is because the bootloader needs to be completely standalone. In the sandbox arch though, we need a little bit of code to glue the u-boot world to the host operating system, and we need to be able to access the host libc's headers in order to do so. Currently, we're using -I/usr/include to workaround the global -nostdinc, but that doesn't work for everyone and for all headers. Instead, let's filter out -nostdinc when building the os.c code. Without this patch, some distros hit errors such as: ---8<--- In file included from /usr/include/fcntl.h:27:0, from os.c:22: /usr/include/features.h:323:26: fatal error: bits/predefs.h: No such file or directory --->8--- Signed-off-by: Andreas Bießmann <biessmann@corscience.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | sandbox: Add timer simulationMatthias Weisser2011-12-103-2/+30
| | | | | | | | | | | | | | Making sleep command work Signed-off-by: Matthias Weisser <weisserm@arcor.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | sandbox: Add improved RAM simulationMatthias Weisser2011-12-102-7/+17
|/ | | | | | | | | Using mmap to allocate memory from the OS for RAM simulation we can use u-boot own malloc implementation. Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Matthias Weisser <weisserm@arcor.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* arm, davinci: Use lldiv for the 64-bit divisions in timer.cChristian Riesch2011-12-101-2/+4
| | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
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