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* rockchip: clk: Make rkclk_get_clk() SoC-specificSimon Glass2016-01-212-29/+0
| | | | | | | | | | | | The current method assumes that clocks are numbered from 0 and we can determine a clock by its number. It is safer to use an ID in the clock's platform data to avoid the situation where another clock is bound before the one we expect. Move the existing code into rk3036 since it still works there. Add a new implementation for rk3288. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: reset: Use the rk_clr/setreg() interfaceSimon Glass2016-01-211-2/+2
| | | | | | Use this function in preference to the macro. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: sdram: Use the rk_clr/setreg() interfaceSimon Glass2016-01-211-4/+3
| | | | | | Use this function in preference to the macro. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clock: Add a function to find a clock by IDSimon Glass2016-01-211-0/+12
| | | | | | | | The current approach of using uclass_get_device() is error-prone. Another clock (for example a fixed-clock) may cause it to break. Add a function that does a proper search. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: jerry: Disable pmic-int-1 setup to avoid a hangSimon Glass2016-01-211-1/+4
| | | | | | | This hangs when activated (by probing the PMIC). Disable it for now until we understand the root cause. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Use pwrseq for MMC start-up on jerrySimon Glass2016-01-211-4/+11
| | | | | | | This is defined in the device tree in Linux. Copy over the settings so that this can be used instead of hard-coding the reset line. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Convert the PMU IOMUX registers into an arraySimon Glass2016-01-211-4/+8
| | | | | | | | | This is easier to deal with when using generic code since it allows us to use a register index instead of naming each register. Adjust it, adding an enum to improve readability. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Avoid using MMC code when not booting from MMCSimon Glass2016-01-211-0/+2
| | | | | | This saves some code space in SPL which is useful on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: bootm: Try to use relocated ramdiskJeffy Chen2016-01-211-1/+11
| | | | | | | | | After boot_ramdisk_high(), ramdisk would be relocated to initrd_start & initrd_end, so use them instead of rd_start & rd_end. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-01-2114-7/+58
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| * dm: video: test: Add tests for the video uclassSimon Glass2016-01-201-0/+7
| | | | | | | | | | | | | | | | | | Add tests that check that the video console is working correcty. Also check that text output produces the expected result. Test coverage includes character output, wrapping and scrolling. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * dm: video: sandbox: Convert sandbox to use driver model for videoSimon Glass2016-01-201-0/+1
| | | | | | | | | | | | | | | | Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * arm: ls1021atwr: Enable driver model lpuart serial driverBin Meng2016-01-202-1/+17
| | | | | | | | | | | | | | | | | | | | | | Convert ls1021atwr_nor_lpuart to driver model support. As a start, enable lpuart serial port driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Alison Wang <alison.wang@nxp.com> Tested-by: Alison Wang <alison.wang@nxp.com> Acked-by: Simon Glass <sjg@chromium.org>
| * arm: ls1021atwr: Split off board device treeBin Meng2016-01-203-3/+18
| | | | | | | | | | | | | | Move /chosen node out of the board device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * arm: ls1021atwr: Convert to driver model and enable serial supportBin Meng2016-01-202-4/+4
| | | | | | | | | | | | | | | | Convert ls1021atwr_nor to driver model support. As a start, enable ns16550 serial port driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * arm: dts: dra7-evm: add tick-timer to chosen nodeMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | Specify timer2 to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: dra72-evm: add tick-timer to chosen nodeMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | Specify timer2 to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: am335x-evm: add tick-timer to chosen nodeMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | Specify timer2 to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: am335x-boneblack: add tick-timer to chosen nodeMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | Specify which timer to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: am437x-gp-evm: add tick-timer to chosen nodeMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | Specify which timer to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: am437x-sk-evm: add tick-timer to chosen nodeMugunthan V N2016-01-201-0/+1
| | | | | | | | | | | | | | Specify which timer to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: omap-common: do not build timer when CONFIG_TIMER definedMugunthan V N2016-01-201-0/+6
| | | | | | | | | | | | | | | | | | | | To prepare timer driver to DM/DT conversion do not build the exiting timer driver when CONFIG_TIMER is defined. But since omap's SPL doesn't support DM yet so built timer driver only for SPL build when CONFIG_TIMER is defined. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2c; branch 'master' of ↵Tom Rini2016-01-213-12/+16
|\ \ | | | | | | | | | git://git.denx.de/u-boot-nds32
| * | nds32: Fix compile error.rick2016-01-213-12/+16
| | | | | | | | | | | | | | | | | | | | | Fix compile error with gcc 4.9.3 Signed-off-by: rick <rick@andestech.com> Cc: Andes <uboot@andestech.com>
* | | sunxi: Add support for the I2C controller which is part of the PRCMJelle van der Waa2016-01-216-0/+30
| |/ |/| | | | | | | | | | | | | | | | | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
* | stm32: move stm32 specific code to mach-stm32Vikas Manocha2016-01-2017-6/+37
| | | | | | | | | | | | | | This patch moves stm32 sources at one place, with this armv7m now contains only generic stuff. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* | armv7: Add missing newline after OMAP die IDLadislav Michl2016-01-201-2/+2
| | | | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Enric Balletbo Serra <enric.balletbo@collabora.com>
* | m68k: M54418TWR: drop board/freescale/m54418twr/config.mkMasahiro Yamada2016-01-201-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The board/freescale/m54418twr/config.mk defined TEXT_BASE, which has the same value as CONFIG_SYS_TEXT_BASE. The TEXT_BASE is referenced by two files: - arch/m68k/cpu/mcf5445x/start.S and include/ - include/configs/M54418TWR.h Replace the references with CONFIG_SYS_TEXT_BASE and delete board/freescale/m54418twr/config.mk. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Angelo Dureghello <angelo at sysam.it>
* | arm, ubifs: fix gcc5.x compiler warningHeiko Schocher2016-01-202-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | compiling U-Boot for openrd_base_defconfig with gcc 5.x shows the following warning: CC fs/ubifs/super.o In file included from fs/ubifs/ubifs.h:35:0, from fs/ubifs/super.c:37: fs/ubifs/super.c: In function 'atomic_inc': ./arch/arm/include/asm/atomic.h:55:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ fs/ubifs/super.c: In function 'atomic_dec': ./arch/arm/include/asm/atomic.h:64:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/sb.o [...] CC fs/ubifs/lpt.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/lpt.c:35: fs/ubifs/lpt.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/lpt_commit.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/lpt_commit.c:26: fs/ubifs/lpt_commit.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/scan.o CC fs/ubifs/lprops.o CC fs/ubifs/tnc.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/tnc.c:30: fs/ubifs/tnc.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/tnc_misc.o Fix it. Signed-off-by: Heiko Schocher <hs@denx.de>
* | ARM: uniphier: remove unneeded if conditionalsMasahiro Yamada2016-01-201-8/+2
| | | | | | | | | | | | | | The if block does the same as the else block does. The conditional is not necessary at all. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: move UMC register macros to umc-regs.hMasahiro Yamada2016-01-202-48/+27
| | | | | | | | | | | | The umc-proxstream2.c defiens the same macros as in umc-regs.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: set active ways to really enable outer cacheMasahiro Yamada2016-01-201-0/+2
| | | | | | | | | | | | Each way must be unlocked to make it effective. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: fix range invalidate for outer cacheMasahiro Yamada2016-01-201-0/+23
| | | | | | | | | | | | | | If invalidate operation is invoked against a cache-unaliged region, the both ends of the region should be flushed, not invalidated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: factor out outer cache sync as a helper functionMasahiro Yamada2016-01-201-4/+8
| | | | | | | | | | | | Avoid repeating the same code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: refactor outer cache operation slightlyMasahiro Yamada2016-01-201-2/+4
| | | | | | | | | | | | Improve readability without changing the behavior. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | armv8: cavium: Add ThunderX 88xx board definitionSergey Temerkhanov2016-01-192-2/+7
| | | | | | | | | | | | | | | | | | This commit adds basic Cavium ThunderX 88xx board definitions and support. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> [trini: Drop CONFIG_SYS_GENERIC_BOARD define] Signed-off-by: Tom Rini <trini@konsulko.com>
* | armv8: cavium: Add the device tree for ThunderXSergey Temerkhanov2016-01-193-0/+395
| | | | | | | | | | | | | | | | | | This commit adds the FDT for the ThunderX family of SoCs Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructureSergey Temerkhanov2016-01-193-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds functions issuing calls to secure monitor or hypervisore. This allows using services such as Power State Coordination Interface (PSCI) provided by firmware, e.g. ARM Trusted Firmware (ATF) The SMC call can destroy all registers declared temporary by the calling conventions. The clobber list is "x0..x17" because of this Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* | armv8: New MMU setup code allowing to use 48+ bits PA/VASergey Temerkhanov2016-01-195-6/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds code which sets up 2-level page tables on ARM64 thus extending available VA space. CPUs implementing 64k translation granule are able to use direct PA-VA mapping of the whole 48 bit address space. It also adds the ability to reset the SCTRL register at the very beginning of execution to avoid interference from stale mappings set up by early firmware/loaders/etc. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* | armv8: Add read_mpidr() functionSergey Temerkhanov2016-01-191-0/+11
| | | | | | | | | | | | | | | | | | | | This patch adds the read_mpidr() function which returns the MPIDR_EL1 register value Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: quark: Fix boot breakageBin Meng2016-01-191-11/+16
| | | | | | | | | | | | | | | | | | With driver model timer conversion, quark based board does not boot any more as mdelay() is called during quark_pcie_early_init() which is before driver model gets initialized. Fix this breakage. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Add more SPDX-License-Identifier tagsTom Rini2016-01-1946-492/+46
| | | | | | | | | | | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-01-1645-1005/+2361
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| * | MIPS: implement bit manipulating I/O accessorsDaniel Schwierzeck2016-01-161-0/+55
| | | | | | | | | | | | | | | | | | | | | Add support for functions clrbits_X(), setbits_X() and clrsetbits_X() on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: fix SPDX license identifier in remaining arch header filesDaniel Schwierzeck2016-01-1614-55/+32
| | | | | | | | | | | | | | | | | | | | | Add a SPDX license identifier to MIPS header files where it is still missing. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: sync processor and register definitions with linux-4.4Daniel Schwierzeck2016-01-168-553/+1211
| | | | | | | | | | | | | | | | | | | | | Update definitions for processor, registers as well as assemby macros. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: sync I/O related header files with linux-4.4Daniel Schwierzeck2016-01-1610-364/+941
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mainly sync asm/io.h to get a working ioremap() implementation as well as the full set of I/O accessors. Pull in additional header files to make this work. Furthermore port over the directory 'arch/mips/include/asm/mach-generic/' with contains default definitions for I/O and memory spaces and default implementations for mapping those spaces. All files in that directory can be overwritten by a SoC/machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFTDaniel Schwierzeck2016-01-162-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: Kconfig: optimize gcc -march and -mtune setupDaniel Schwierzeck2016-01-164-15/+24
| | | | | | | | | | | | | | | | | | | | | | | | Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: au1x00: move SoC header files to arch/mips/mach-au1x00/include/mach/Daniel Schwierzeck2016-01-164-3/+3
| | | | | | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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