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* arm: mx6: ddr3: Remove dead codeNikolay Dimitrov2015-05-151-22/+0
* mx6: Set shared override bit in PL310 AUX_CTRL registerFabio Estevam2015-05-152-0/+10
* hummingboard: Remove mx6solo specific supportFabio Estevam2015-05-151-5/+0
* imx: dek_blob: Add explicit include for mapmemUlises Cardenas2015-05-151-0/+1
* arm: mx6: Clamp MMDC and DDR3 clocks for timing calculationsNikolay Dimitrov2015-05-151-7/+23
* sandbox: dts: add sandbox_pmic.dtsi and include it to sandbox.dts and test.dtsPrzemyslaw Marczak2015-05-143-0/+88
* test: dm: test.dts - move to sandbox dts directoryPrzemyslaw Marczak2015-05-142-0/+231
* odroid: dts: add 'voltage-regulators' description to max77686 nodePrzemyslaw Marczak2015-05-141-0/+253
* pmic: max77686 set the same compatible as in the kernelPrzemyslaw Marczak2015-05-144-4/+4
* i2c: mxc: refactor i2c driver and support dmPeng Fan2015-05-142-8/+37
* imx: mx27 move GPIO_PORTx to gpio.hPeng Fan2015-05-142-22/+20
* sandbox: Support wide-screen LCD emulationSimon Glass2015-05-141-2/+2
* sandbox: Add missing errno.h includes in a few filesSimon Glass2015-05-141-0/+1
* sandbox: Correct error handling in state_read_file()Simon Glass2015-05-141-1/+1
* arm: Add a prototype for save_boot_params_ret()Simon Glass2015-05-141-0/+16
* arm: Include the .got section in the binarySimon Glass2015-05-141-1/+2
* tpm: Rename Infineon TPM to slb9645ttSimon Glass2015-05-142-2/+2
* sunxi: ohci: Add ohci usb host controller supportHans de Goede2015-05-142-0/+4
* arch/arm/lib/bootm-fdt.c: Guard the include of <asm/armv7.h>Tom Rini2015-05-141-0/+2
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-05-1445-222/+1393
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| * ARM: tegra: move NVIDIA common files to arch/arm/mach-tegraMasahiro Yamada2015-05-134-1/+326
| * jetson-tk1: Add PSCI configuration options and reserve secure codeIan Campbell2015-05-131-0/+2
| * tegra: Boot in non-secure mode by defaultJan Kiszka2015-05-131-1/+1
| * ARM: tegra: Enable SMMU when going non-secureThierry Reding2015-05-132-0/+42
| * tegra: Set CNTFRQ for secondary CPUsJan Kiszka2015-05-131-0/+13
| * tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0Ian Campbell2015-05-133-0/+21
| * tegra124: Add PSCI support for Tegra124Jan Kiszka2015-05-135-0/+174
| * ARM: Add board-specific initialization hook for PSCIJan Kiszka2015-05-132-0/+7
| * tegra: Make tegra_powergate_power_on publicJan Kiszka2015-05-132-1/+2
| * virt-dt: Allow reservation of secure region when in a RAM carveoutJan Kiszka2015-05-133-0/+36
| * tegra124: Add more registers to struct mc_ctlrIan Campbell2015-05-131-2/+33
| * ARM: Put target PC for PSCI CPU_ON on per-CPU stackJan Kiszka2015-05-132-9/+11
| * ARM: Factor out reusable psci_get_cpu_stack_topJan Kiszka2015-05-132-10/+19
| * ARM: Factor out reusable psci_cpu_entryJan Kiszka2015-05-132-18/+25
| * ARM: Factor out reusable psci_cpu_off_commonJan Kiszka2015-05-132-62/+78
| * ARM: Factor out common psci_get_cpu_idJan Kiszka2015-05-132-5/+15
| * ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditionsJan Kiszka2015-05-137-10/+10
| * tegra124: video: Add full link training for eDPSimon Glass2015-05-131-0/+4
| * tegra: video: support eDP displays on Tegra124 devicesSimon Glass2015-05-131-0/+58
| * tegra: dts: nyan-big: Add definitions for eDP displaySimon Glass2015-05-131-0/+43
| * tegra: Move display controller header into commonSimon Glass2015-05-133-12/+55
| * tegra124: clock: Add display clocks and functionsSimon Glass2015-05-135-9/+173
| * tegra: clock: Split the clock source code into a separate functionSimon Glass2015-05-132-22/+40
| * tegra: clock: Add checking for invalid clock IDsSimon Glass2015-05-132-4/+29
| * tegra124: dts: Add host1x node to provide display informationSimon Glass2015-05-131-0/+84
| * tegra: nyan-big: Add LCD PMIC init and board IDSimon Glass2015-05-131-0/+4
| * tegra: Provide a function to allow LCD PMIC setupSimon Glass2015-05-131-0/+8
| * tegra: Add a board ID functionSimon Glass2015-05-131-5/+6
| * tegra: Move checkboard() into the board codeSimon Glass2015-05-131-8/+0
| * tegra: pwm: Allow the clock rate to be left as isSimon Glass2015-05-132-2/+5
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