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* x86: Add various minor tidy-ups in mrccache codesBin Meng2015-10-212-18/+16
* x86: Do sanity test on the cache record in mrccache_update()Bin Meng2015-10-212-1/+4
* x86: Move mrccache.[c|h] to a common placeBin Meng2015-10-215-4/+3
* x86: Add ENABLE_MRC_CACHE Kconfig optionBin Meng2015-10-211-0/+8
* x86: fsp: Add a hdr sub-command to show header informationBin Meng2015-10-211-1/+31
* x86: fsp: Make hob command a sub-command to fspBin Meng2015-10-213-7/+28
* x86: fsp: Print GUID whenever applicable in the hob command outputBin Meng2015-10-211-3/+19
* x86: fsp: Compact the output of hob commandBin Meng2015-10-211-14/+14
* x86: Add SMBIOS table supportBin Meng2015-10-215-0/+522
* x86: Move install_e820_map() out of zimage.cBin Meng2015-10-215-29/+41
* x86: Initialize GDT entry 1 to be the 32-bit CS as wellBin Meng2015-10-211-1/+6
* x86: Allow disabling IGD on Intel QueensbayBin Meng2015-10-213-0/+32
* x86: ivybridge: Remove the dead codes that programs pci bridgeBin Meng2015-10-211-32/+0
* x86: fsp: Report correct number of E820 table entriesBin Meng2015-09-281-1/+2
* x86: quark: Configure MTRR to enable cacheBin Meng2015-09-163-0/+111
* x86: galileo: Add PCIe root port IRQ routingBin Meng2015-09-161-0/+12
* x86: quark: Initialize thermal sensor properlyBin Meng2015-09-162-0/+54
* x86: quark: Lock HMBOUND register before jumping to kernelBin Meng2015-09-162-0/+4
* x86: quark: Convert to use clrbits, setbits, clrsetbits macrosBin Meng2015-09-161-51/+21
* x86: quark: Add clrbits, setbits, clrsetbits macros for message port accessBin Meng2015-09-161-0/+31
* x86: quark: Add PCIe/USB static register programming after memory initBin Meng2015-09-162-0/+86
* x86: Convert to use driver model eth on quark/galileoBin Meng2015-09-161-19/+0
* x86: quark: Add USB PHY initialization supportBin Meng2015-09-092-0/+49
* x86: Convert to use driver model pci on quark/galileoBin Meng2015-09-094-78/+6
* x86: Enable PCIe controller on quark/galileoBin Meng2015-09-092-0/+105
* x86: quark: Avoid chicken and egg problemBin Meng2015-09-091-15/+15
* x86: quark: Optimize MRC execution timeBin Meng2015-09-092-22/+57
* x86: coreboot: Convert to use more dm driversBin Meng2015-09-091-6/+0
* x86: panther: Add PCI and video configurationSimon Glass2015-09-091-0/+10
* exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devicesSimon Glass2015-08-312-0/+10
* x86: crownbay: Support Topcliff integrated pci uart devices with driver modelBin Meng2015-08-261-5/+10
* x86: crownbay: Enable on-board SMSC superio keyboard controllerBin Meng2015-08-261-1/+1
* x86: minnowmax: Correct pad-offset value for host_en1Simon Glass2015-08-261-1/+1
* x86: minnowmax: Add access to GPIOs E0, E1, E2Simon Glass2015-08-261-0/+27
* x86: Add DSDT table for supporting ACPI on QEMUSaket Sinha2015-08-267-1/+712
* x86: Add ACPI table support to QEMUSaket Sinha2015-08-262-0/+177
* x86: Generate a valid ACPI tableSaket Sinha2015-08-265-0/+844
* x86: superio: Add keyboard controller support to smsc_lpc47m driverBin Meng2015-08-261-0/+3
* x86: baytrail: Remove the fsp_init_phase_pci() callBin Meng2015-08-261-7/+1
* x86: queensbay: Move unprotect_spi_flash() to arch_misc_init()Bin Meng2015-08-261-2/+2
* x86: fsp: Add comments about U-Boot entering start.S twiceBin Meng2015-08-263-4/+6
* x86: fsp: Enlarge the size of malloc() pool before relocationBin Meng2015-08-263-1/+30
* x86: baytrail: Support multiple microcode copiesBin Meng2015-08-262-0/+9
* x86: baytrail: Add microcode for BayTrail-I D0 steppingBin Meng2015-08-261-0/+3284
* x86: kconfig: Hide "System tables" for corebootBin Meng2015-08-261-1/+1
* x86: kconfig: Hide "System tables" for EFIBin Meng2015-08-261-3/+1
* x86: coreboot: Allow >=4GiB memory bank sizeBin Meng2015-08-261-5/+4
* x86: Remove calculate_relocation_address()Bin Meng2015-08-263-60/+2
* x86: coreboot: Correctly report E820 typesBin Meng2015-08-261-2/+13
* x86: coreboot: Increase memrange entry number to 32Bin Meng2015-08-261-6/+3
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