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* x86: Import MSR/MTRR code from LinuxGraeme Russ2012-12-063-0/+913
| | | | | | Imported from Linux 3.1 with a few modifications to suit U-Boot Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add basic cache operationsStefan Reinauer2012-12-062-0/+121
| | | | | | | Add functions to enable/disable the data cache. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add a CBMEM timestamp generated right before the kernel startup.Vadim Bendebury2012-12-061-0/+1
| | | | | | | | | | To maintain the initialization state of the timestamp facility, thesq pointer to the CBMEM section containing the timestamp table should be kept in the .data section (so that it is maintained across u-boot relocation). Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Enable coreboot timestamp facility support in u-boot.Vadim Bendebury2012-12-061-0/+51
| | | | | | | | | | | | | | | | | | | | | This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add function to read time stamp counterVadim Bendebury2012-12-061-0/+12
| | | | | | | | | | | Put this function in the u-boot-x86.h header file. We could instead create timer.h perhaps. We support setting a base time, and reading the time relative to this base. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: gpio: Add GPIO driver for Intel ICH6 and later.Bill Richardson2012-12-061-0/+27
| | | | | | | | | Implement <asm-generic/gpio.h> functions for Intel ICH6 and later. Only GPIOs 0-31 are handled by this code. Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Don't spam POST80 codes with slow IO functionsStefan Reinauer2012-11-301-1/+1
| | | | | | | | | | | | | | This patch prevents u-boot from "spamming" random progress codes on a port 80 "post card". The previous version of this patch just removed the delays in the "slow" IO functions, as they do not need to be slow, however, this patch is less intrusive. It uses another unused port that is often used by BIOSes (and the Linux Kernel) for small delay timing purposes. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Include types.h explicitly in the i386 version of io.hGabe Black2012-11-301-0/+2
| | | | | | | | | | The i386 version of io.h depends on the phys_addr_t type which is defined in types.h. It wasn't including that explicitly, and was working presumably because the other files including it had already included types.h themselves directly or indirectly. This change fixes that. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add a default implementation for cleanup_before_linux()Gabe Black2012-11-301-0/+1
| | | | | | | | | | | This function provides an opportunity for some last minute cleanup and reconfiguration before control is handed over to Linux. It's possible this may need to do something in the future, but for now it's left empty. It's set up as a weak symbol so it can be overridden if necessary on a case by case basis. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add an fdt pointer to the global data structureGabe Black2012-11-301-0/+1
| | | | | | | | This change adds a pointer to the global data structure in x86 to point to the device tree. This mirrors an identical pointer in ARM. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: coreboot: Decode additional coreboot sysinfo tagsSimon Glass2012-11-302-7/+101
| | | | | | | | | | | Add support for decoding tags for GPIOs, compile/build info, cbmem and other features. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: coreboot: Tell u-boot about PCI bus 0 when initializingGabe Black2012-11-281-1/+1
| | | | | | | | | | | | | | | | | U-boot needs a host controller or "hose" to interact with the PCI busses behind them. This change installs a host controller during initialization of the coreboot "board" which implements some of X86's basic PCI semantics. This relies on some existing generic code, but also duplicates a little bit of code from the sc520 implementation. Ideally we'd eliminate that duplication at some point. It looks like in order to scan buses beyond bus 0, we'll need to tell u-boot's generic PCI configuration code what to do if it encounters a bridge, specifically to scan the bus on the other side of it. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Add some missing includesGabe Black2012-11-282-0/+5
| | | | | | | | | I suspect these includes were usually available because something else included them earlier or because they were brought in transitively. Change-Id: I6aae2ac94dc792eac6febb4345e8125f69f70988 Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add initial memory barrier macrosSimon Glass2012-11-281-0/+8
| | | | | | These are available on other architectures, so add them on x86. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add ilog2 to bitopsGraeme Russ2012-11-281-0/+5
| | | | | | | ilog2 is required by AHCI driver Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Put global data on the stackGraeme Russ2012-11-283-2/+1
| | | | | | | | | | Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Forward declare gd_tGraeme Russ2012-11-281-3/+5
| | | | | | | | So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* x86: Change global data baudrate to intSimon Glass2012-10-191-1/+1
| | | | | | | This doesn't need to be a long, so change it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
* global_data: unify global flag definesMike Frysinger2012-08-091-13/+1
| | | | | | | All the global flag defines are the same across all arches. So unify them in one place, and add a simple way for arches to extend for their needs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: move bootfile init into eth_initializeMike Frysinger2012-05-151-1/+0
| | | | | | | | All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* net: punt bd->bi_ip_addrMike Frysinger2012-05-152-2/+0
| | | | | | | | | This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* x86: Convert board_init_f_r to a processing loopGraeme Russ2012-01-042-0/+38
| | | | | | | | | | | | | | Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
* x86: Split init functions out of board.cGraeme Russ2012-01-042-0/+81
| | | | | | This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
* x86: Create weak init_cache() and default enable_caches() functionsGraeme Russ2012-01-041-0/+1
| | | | | | -- Changes for v2: - Tweaked commit title
* x86: Use fs for global dataGraeme Russ2012-01-043-7/+17
| | | | | | | | | | | | | | | | | | | | | | Use the base address of the 'F' segment as a pointer to the global data structure. By adding the linear address (i.e. the 'D' segment address) as the first word of the global data structure, the address of the global data relative to the 'D' segment can be found simply, for example, by: fs movl 0, %eax This makes the gd 'pointer' writable prior to relocation (by reloading the Global Desctriptor Table) which brings x86 into line with all other arches NOTE: Writing to the gd 'pointer' is expensive (but we only do it twice) but using it to access global data members (read and write) is still fairly cheap -- Changes for v2: - Rebased against changes made to patch #3 - Removed extra indent - Tweaked commit message
* x86: Simplify Flash-to-RAM code execution transitionGraeme Russ2012-01-041-0/+2
| | | | | | | | | | | Move the relocation offset calculation out of assembler and into C. This also paves the way for the upcoming init sequence simplification by adding the board_init_f_r flash to RAM transitional function -- Changes for v2: - Added commit message - Minor adjustment to new stack address comment
* x86: Remove GDR related magic numbersGraeme Russ2012-01-041-4/+19
| | | | | | | | -- Changes for v2: - Use an enum - Add defined for GDT size (previously added in patch 7) - Use X86_ namespace (as per Linux headers)
* x86: Import glibc memcpy implementationGraeme Russ2012-01-021-1/+1
| | | | | | | | Taken from glibc version 2.14.90 -- Changes for v2: - None
* x86: Refactor the zboot innards so they can be reused with a vboot imageGabe Black2011-12-191-3/+5
| | | | | | | | | | | | | | | If vboot successfully verifies a kernel, it will leave it in place and basically ready to boot. The zeropage table which is part of the x86 boot protocol is at the end of the kernel, though, instead of the beginning, and because the image is already in place there's no need to copy it around. This change refactors the code which implements the zboot command so that the configuration of the zeropage table and loading the pieces of the kernel into memory are done separately. Also, because the command line goes before the zeropage table in vboot which is somewhat incompatible with the normal protocol, where to put the command line is a now a parameter instead of being hard coded. Signed-off-by: Gabe Black <gabeblack@chromium.org>
* x86: Add support for booting Linux using the 32 bit boot protocolGabe Black2011-12-191-2/+7
| | | | | | | | | This change conditionally modifies the zboot command so that it can use the 32 bit boot protocol. This is necessary because the 16 bit realmode entry point assumes that it can call BIOS services which neither coreboot nor u-boot provide. Signed-off-by: Gabe Black <gabeblack@chromium.org>
* x86: Clean up the x86 zimage code in preparation to extend itGabe Black2011-12-191-21/+0
| | | | | | | | This change cleans up some formatting issues in the zimage handling code, and converts it from using offsets added to a base pointer to using the available structure definitions which were already being included. Signed-off-by: Gabe Black <gabeblack@chromium.org>
* x86: Import code from coreboot's libpayload to parse the coreboot tableGabe Black2011-12-193-0/+341
| | | | | | | | | | | | | This change also forces the lib_sysinfo structure to be in the .data section. Otherwise it ends up in the .bss section. U-boot assumes that it doesn't need to copy it over during relocation, and instead fills that whole section with zeroes. If we really were booting from ROM that would be appropriate, but we need some information from the coreboot tables (memory size) before then and have to fill that structure before relocation. We skirt u-boot's assumption by putting this in .data where it assumes there is still read only but non-zero data. Signed-off-by: Gabe Black <gabeblack@chromium.org>
* x86: Import the glibc memset implementationGabe Black2011-11-291-1/+1
| | | | | | | The new implementation is about twice as fast as the old. This is from glibc-2.14, sysdeps/i386/memset.c. Signed-off-by: Gabe Black <gabeblack@chromium.org>
* x86: Misc PCI touchupsGraeme Russ2011-11-291-1/+1
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* sc520: Create arch asm-offsetsGraeme Russ2011-11-292-45/+0
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Punt cold- and warm-boot flagsGraeme Russ2011-11-291-2/+0
| | | | | | | Nobody uses them anyway Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* cosmetic: checkpatch cleanup of arch/x86/lib/*.cGraeme Russ2011-11-293-0/+15
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Remove the prototype for the unused function board_initGabe Black2011-11-021-1/+0
| | | | Signed-off-by: Gabe Black <gabeblack@chromium.org>
* x86: Rename include/asm/ic to include/asm/arch-sc520Graeme Russ2011-11-023-0/+0
| | | Also include some trivial related cleanups
* x86: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-231-0/+35
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Graeme Russ <graeme.russ@gmail.com>
* image: push default arch values to arch headersMike Frysinger2011-10-051-0/+3
| | | | | | | | | This pushes the ugly duplicated arch ifdef lists we maintain in various image related files out to the arch headers themselves. Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* console: Implement pre-console bufferGraeme Russ2011-10-051-0/+3
| | | | | | | | | | | | | Allow redirection of console output prior to console initialisation to a temporary buffer. To enable this functionality, the board (or arch) must define: - CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer - CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer - CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes) The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes Any earlier characters are silently dropped.
* Convert ISO-8859 files to UTF-8Albert ARIBAUD2011-08-0411-11/+11
| | | | | | | | There was a mix of UTF-8 and ISO-8859 files in the U-Boot source tree, which could cause issues with the patchwork review system. This commit converts all ISO-8859 files to UTF-8. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Unify timer_init() and cpu_init() prototypesWolfgang Denk2011-08-011-1/+0
| | | | | | | | | | Clean up some duplicated prototype declarations. Get rid of now useless AVR32 initcalls.h file. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Graeme Russ <graeme.russ@gmail.com>
* cleanup: Fix typos and misspellings in various files.Mike Williams2011-07-281-1/+1
| | | | | | | | | | | Recieve/Receive recieve/receive Interupt/Interrupt interupt/interrupt Addres/Address addres/address Signed-off-by: Mike Williams <mike@mikebwilliams.com>
* x86: Rename i386 to x86Graeme Russ2011-04-1330-0/+2512
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
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