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* crypto/fsl: Add fixup for crypto nodeRuchika Gupta2015-01-231-0/+17
| | | | | | | | | | | Era property is added in the crypto node in device tree. Move the code to do so from arch/powerpc/mpc8xxx/fdt.c to drivers/sec/sec.c so that it can be used across arm and powerpc platforms having crypto node. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> [York Sun: Fix commit message indentation] Reviewed-by: York Sun <yorksun@freescale.com>
* arm: ls102xa: Add dummy gpio.h to enable CONFIG_OF_CONTROLRuchika Gupta2015-01-231-0/+15
| | | | | | | | | | | | | | | | If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled. It includes <asm/gpio.h> and then <asm/gpio.h> includes <asm/arch/gpio.h>. As a result, all the SoCs that enable CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they do not support GPIO. The right fix would be to split the lib/fdtdec.c to remove dependency on GPIO.This commit adds a dummy <asm/arch/gpio.h> to support OF_CONTROL for LS102x platform. This dummy header will be removed after FDT-GPIO stuff is fixed correctly. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* ls102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as defaultAlison Wang2015-01-231-0/+2
| | | | | | | | | | This patch reverts to use ge0_clk125 for eTSEC clock muxing. For SAI and CAN which are pin multiplexed with RGMII1 in EC1 of RCW, ge2_clk125 will be used via hwconfig. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* arm/ls1021a: Add workaround for DDR erratum A008378York Sun2015-01-231-0/+1
| | | | | | | Internal memory controller counters can reach a bad state after training in DDR4 mode if accumulated ECC or DBI mode is eanbled. Signed-off-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-01-2314-157/+620
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| * sunxi: Hookup OTG USB controller supportHans de Goede2015-01-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | Hookup OTG USB controller support and enable the otg controller + USB-keyb on various tablets. This allows tablet owners to interact with u-boot without needing to solder a serial console onto their tablet PCB. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: video: Use frontend for dma on sun4i to fix memory bandwidth problemsHans de Goede2015-01-222-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Testing has shown that on sun4i the display backend engine does not have deep enough fifo-s causing flickering / tearing in full-hd mode due to fifo underruns. On sun4i use the display frontend engine to do the dma from memory, as the frontend does have deep enough fifo-s. As added advantage of this is that it results in much better memory bandwidth as it reduces the amount of dram bank switches, for more details see: http://ssvb.github.io/2014/11/11/revisiting-fullhd-x11-desktop-performance-of-the-allwinner-a10.html Note that this changes the pipeline searched for in the simplefb node, we can get away with doing this now, since no kernel has yet shipped with simplefb dtb nodes, and I will make sure to get a simplefb node with the new pipeline into 3.19 before it ships. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Stop differentiating between 512M and 1G variants of the same boardHans de Goede2015-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While working on adding more boards I noticed that we lack a config for the 512M cubieboard, and that some of the new boards which I want to add also have 512M and 1G variants, rather then adding 2 defconfig's for all of these, lets switch the exising boards which have both a 512M and 1024M variant over to the sun4i dram autoconfig code. This also drops the foo_RAMSIZE_defconfig variants of boards where we currently have 2 separate configs already. Note: 1) The newly introduced CONFIG_DRAM_EMR1 kconfig value is not used with a value other then its default for now, but we need this to be configurable to support some new boards with auto dram config. 2) We always set all CONFIG_DRAM_foo values in defconfigs, even if they match the defaults, this is done to make it more clear what values are used for a certain board. This has been tested on a Mele A1000, Mini-X and a Cubieboard, all 1G variants, the dram autoconfig code has also been tested on a 512M mk802 (a defconfig for the mk802 is added in a later patch). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: mmc: Add support for sun9i (A80)Hans de Goede2015-01-221-2/+6
| | | | | | | | | | | | | | The clocks on the A80 are hooked up slightly different, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun9i: Add sun9i (A80) clock setup supportHans de Goede2015-01-222-0/+69
| | | | | | | | | | | | | | | | Add initial sun9i (A80) clock setup support, enough to get the uart + mmc going. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun9i: Add clock_sun9i.h with ccu register layout for sun9iHans de Goede2015-01-222-0/+141
| | | | | | | | | | | | | | Add a headerfile with the sun9i ccu register layout. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sun9i: Add cpu_sun9i.h with iomem definesHans de Goede2015-01-222-0/+112
| | | | | | | | | | | | | | Add a headerfile with all the base addresses from the sun9i blocks. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Rename cpu.h to cpu_sun4i.hHans de Goede2015-01-222-145/+157
| | | | | | | | | | | | | | | | | | sun4i - sun8i have (aprox.) the same iomem layout, but sun9i is quite different, so add a wrapper cpu.h which includes the right mach specific cpu_sun#i.h based on mach, like we already do with clock.h and dram.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headersHans de Goede2015-01-223-4/+12
| | | | | | | | | | | | | | | | | | | | | | Which pll-s are available depends on the machine type, move the clock_get_pllX / clock_set_pllX prototypes to the clock_sun?i.h header files so that we only declare what is actually available. e.g. clock_get_pll5p() is not available on sun6i / sun8i, and with sun9i we get a completely different set of plls. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Drop pll6 setting from clock_init_uartHans de Goede2015-01-221-4/+1
| | | | | | | | | | | | | | | | As the comment says now that we have SPL support this is no longer necessary, as PLL6 is already setup with the exact same parameters by the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: display: Make lcd display clk phase configurableHans de Goede2015-01-221-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While running some tests with an Olinuxino-A13-Micro + a 7" Olimex LCD module I noticed that the screen flickered. This is caused by the lcd display clk phase reg value being set to 0, where it should be 1 in this setup. This commit adds a Kconfig option for the lcd display clk phase, so that we can set it per board. This defaults to 1, because looking at all the fex files in sunxi-boards, that is by far the most used value. This commit updated the Ippo and MSI Primo73 tablet defconfigs to override the default of 1 with 0, as that is the correct value for those tablets, this keeps the register settings the same as before this commit. The Olinuxino-A13 defconfigs are not updated, changing the register setting for these boards from 0 to 1, this is intentional. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2015-01-2212-1126/+128
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| * | ARM: UniPhier: add SG_MEMCONF macros for DDR channel 2Masahiro Yamada2015-01-231-0/+44
| | | | | | | | | | | | | | | | | | PH1-sLD3, PH1-LD6b have DDR channel 2. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: rename SG_MEMCONF_* macros for readabilityMasahiro Yamada2015-01-231-20/+20
| | | | | | | | | | | | | | | | | | | | | Match the suffixes of SG_MEMCONF_* macros with SZ_* macros defined by <linux/sizes.h> for readability. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: use <linux/sizes.h> for readabilityMasahiro Yamada2015-01-231-12/+13
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: remove non-sense inline directivesMasahiro Yamada2015-01-233-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | The inlining is done by GCC when needed, there is no need to do it explicitly. Furthermore, the inline keyword does not force-inline the code, but is only a hint for the compiler. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: add static to local functionsMasahiro Yamada2015-01-236-15/+15
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: fix IECTRL set code for PH1-Pro4Masahiro Yamada2015-01-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | For PH1-Pro4, the bit 6 of the IECTRL must be set. It is the only available bit in this register. There is no effect of the write access to the other bits. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: describe init_page_table shorterMasahiro Yamada2015-01-232-1069/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | The assembly directive ".rept ... .endr" allows us to write the init_page_table much shorter. To make things further simpler, set the text and stack area as Normal Memory, and the other sections as Device attribute. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: fix comments in SoC Glue init functionMasahiro Yamada2015-01-232-2/+2
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: UniPhier: remove __packed that causes a problem on GCC 4.9Masahiro Yamada2015-01-231-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DDR PHY training function, ddrphy_prepare_training() would not work if compiled with GCC 4.9. The struct ddrphy (arch/arm/include/asm/arch-uniphier/ddrphy-regs.h) is specified with __packed because it represents a hardware register mapping, but it turned out to cause a problem on GCC 4.9. If -mno-unaligned-access is specified (yes, it is in arch/arm/cpu/armv7/config.mk), GCC 4.9 is aware of the __attribute__((packed)) and generates extra instructions to perform the memory access in a way that does not cause unaligned access. (Actually it is not need here because the register base, the first argument of the ddrphy_prepare_training(), is always given with a 4-byte aligned address.) Anyway, as a result, readl() / writel() is divided into byte-wise accesses. The problem is that this hardware only accepts 4-byte register access. Byte-wise accesses lead to unexpected behavior. There are some options to avoid this problem. [1] Remove -mno-unaligned-access [2] Add __aligned(4) along with __packed to struct ddrphy [3] Remove __packed from struct ddrphy [1] solves the problem for ARMv7, but it does not for pre-ARMv6 and ARMv6-M architectures where -mno-unaligned-access is default. So, [1] does not seem reasonable in terms of code portability. Both [2] and [3] work well, but [2] seems too much. All the members of struct ddrphy have the u32 type. No padding would be inserted even if __packed is dropped. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Tom Rini <trini@ti.com>
* | Merge branch 'phys_t' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-01-221-1/+1
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| * mmc: zynq: Use phys_addr_t for addressesMichal Simek2015-01-211-1/+1
| | | | | | | | | | | | | | phys_addr_t is designed for physical addresses that's why use it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sunxi: Restore lowlevel_init usageHans de Goede2015-01-211-21/+21
|/ | | | | | | | | | | | | | | | | | 2 recent sunxi changes have removed the usage of lowlevel_init by moving some code around and then setting CONFIG_SKIP_LOWLEVEL_INIT. This is problematic for 2 reasons: 1) It does not just stop s_init from being called, it also stops cpu_init_cp15 from getting called, which is undesirable. 2) We want u-boot.bin to be usable standalone, without SPL, some people e.g. use an upstream u-boot.bin together with Allwinner's boot0 loader. So u-boot.bin must (re)initialize the gpios, timer, etc. This commit restores the lowlevel_init / s_init usage, while keeping the changes to no longer use the global-data (gd) struct in the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2015-01-206-0/+192
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| * mmc: rmobile: Add SDHC support for Renesas rmobile ARM SoCNobuhiro Iwamatsu2015-01-196-0/+192
| | | | | | | | | | | | | | | | This adds Renesas rmobile ARM SoC's SD/MMC host support. This drivers tested with Gose board and Koelsch board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | zynq: Remove reference to gdataSimon Glass2015-01-201-3/+0
| | | | | | | | | | | | | | | | The global_data pointer (gd) has already been set before board_init_f() is called. We should not assign it again. We should also not use gdata since it is going away. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sunxi: Drop use of lowlevel_init()Simon Glass2015-01-161-5/+0
| | | | | | | | | | | | | | | | This does nothing now, so drop it. We have SPL anyway to do our low-level init. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Move SPL s_init() code to board_init_f()Simon Glass2015-01-161-32/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current sunxi implementation uses gdata, which is going away. It also sets up DRAM before board_init_f() in SPL. There is really no reason to do much in s_init() since board_init_f() is called immediately afterwards. The only change is that we need our own implementation of board_init_f() which sets up DRAM before the BSS (which is in DRAM) is cleared. The s_init() code runs once for SPL and again for U-Boot proper. We shouldn't need to init the clock/timer/gpio/i2c init twice, so just have it in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm: Add warnings about using gdataSimon Glass2015-01-161-1/+6
| | | | | | | | | | | | | | | | | | We need to get rid of this SPL-specific setting of the global_data pointer. It is already set up in start.S immediately before board_init_f() is called, and there may be information there that is needed (e.g. pre-reloc malloc info). Signed-off-by: Simon Glass <sjg@chromium.org>
* | TI ARMv7: Don't use GD before crt0.S has set itTom Rini2015-01-164-30/+11
|/ | | | | | | | | | | | | | | | | Prior to this change we set the gd pointer early so that we can store data in it. This becomes problematic for DM changes as well as being odd in general. Re-work the code paths so that we don't need to set the gd pointer so early and instead can rely upon the normal setting of it. In order to do this we do need to move certain calls from s_init into spl_board_init(), mainly preloader_console_init and save_omap_boot_params. Tested on: Beaglebone Black, AM43xx GP EVM, Beagleboard, Beagleboard xM, OMAP5 uEVM, DRA7xx EVM Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2015-01-166-51/+138
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| * arm: am437x: Enable hardware leveling for EMIFJames Doublesin2015-01-136-51/+138
| | | | | | | | | | | | | | | | | | | | | | | | Switch to using hardware leveling for certain parameters on the EMIF rather than using precalculated values. Doing this also means we have a common place now between am437x and am335x for setting emif_sdram_ref_ctrl with a value for the correct delay length. Tested-by: Felipe Balbi <balbi@ti.com> Tested-by: Tom Rini <trini@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | ARM: armv8: Fix typo in commentaryMichal Simek2015-01-141-1/+1
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Add support for Seagate BlackArmor NAS220Evgeni Dobrev2015-01-141-0/+4
| | | | | | | | | | | | Add support for Seagate BlackArmor NAS220 Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com>
* | sunxi: usbc: Add support for usb-vbus0 controller by axp drivebus pinHans de Goede2015-01-141-0/+26
| | | | | | | | | | | | | | | | | | The axp221 / axp223's N_VBUSEN pin can be configured as an output rather then an input, and this is used on some boards to control usb-vbus0, add support for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: usbc: Add support for usb0 to the common usbc codeHans de Goede2015-01-143-9/+30
| | | | | | | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Move usb-controller init code out of ehci-sunxi.c for reuse for otgHans de Goede2015-01-146-3/+254
| | | | | | | | | | | | | | | | | | | | Most of the usb-controller init code found in ehci-sunxi.c also is necessary to init the otg usb controller, so move it to a common place. While at it also update various #ifdefs / defines for sun8i support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sun7i: Move psci_arch_init close to text_endJan Kiszka2015-01-141-40/+40
| | | | | | | | | | | | | | | | | | "adr rX, text_end" only works if the label is close. Adding further code to the other functions will prevent this. So move the containing function close to label. No functional change. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sun7i: Add support for taking CPUs offline via PSCIJan Kiszka2015-01-141-0/+171
| | | | | | | | | | | | | | | | | | | | | | Based on the original version by Marc Zyngier. It adds a psci_cpu_off implementation for the A20 SoC. The mechanism works by first preparing the calling CPU to go offline (disable and flush cache, disable SMP), then requesting CPU 0 to pull the plug. The request is sent as FIQ on SGI15. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: video: Add lvds supportHans de Goede2015-01-143-0/+15
| | | | | | | | | | | | | | Add support for lvds lcd panels Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* | sunxi: video: Add VGA output supportHans de Goede2015-01-142-0/+78
| | | | | | | | | | | | | | Add support for VGA directly from the sunxi SoC / display engine. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: video: Add lcd output supportHans de Goede2015-01-142-6/+26
| | | | | | | | | | | | | | | | Add lcd output support, see the new Kconfig entries and doc/README.video for how to enable / configure this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: video: Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1Hans de Goede2015-01-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Modify sunxi_lcdc_pll_set to work with both tcon0 and tcon1, this is a preparation patch for adding lcd support. While at it also swap the divider search order, searching from low to high, as the comment above the code says we should do. In cases where there are multiple solutions this will result in picking a lower pll clock and divider, which is more stable and saves power. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: gpio: Add support for gpio pins on the AXP209 pmicHans de Goede2015-01-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards use GPIO-s on the pmic, one example of this is the A13-OLinuXino board, which uses gpio0 of the axp209 for the lcd-power signal. This commit adds support for gpio pins on the AXP209 pmic, the sunxi_gpio.c changes are universal, adding gpio support for the other AXP pmics (when necessary) should be a matter of adding the necessary axp_gpio_foo functions to their resp. drivers, and add "#define AXP_GPIO" to their header file. Note this commit only adds support for the non device-model version of the gpio code, patches for adding support to the device-model version are very welcome. The string representation for these gpio-s is AXP0-#, the 0 in the AXP0 prefix is there in case we need to support gpio-s on more then 1 pmic in the future. At least A80 boards have 2 pmics, and we may end up needing to support gpio-s on both. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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