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* ARM:AM33XX: Fix ddr and timer register offsetChandan Nath2012-01-162-23/+25
| | | | | | | | This patch is added to update incorrect ddr and timer register offset. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM:AM33XX: Replace CONFIG_AM335X with CONFIG_AM33XXChandan Nath2012-01-161-1/+1
| | | | | | | | | This patch is added to replace CONFIG_AM335X symbol with CONFIG_AM333XX for AM33XX platforms. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Thomas Weber <weber@corscience.de>
* omap4: fix boot issue on ES2.0 PandaAneesh V2012-01-161-1/+1
| | | | | | | | | | | | | Fix boot issue on ES2.0 Panda by tuning some IO settings. The CONTROL_EFUSE_2 register has to be over-ridden in software for 4430 boards. Commit 23e9f0723e48615332119de4f4ec7a833a282628 wrongly did this for CONTROL_EFUSE_1. Reverting this and doing it for CONTROL_EFUSE_2. Signed-off-by: Aneesh V <aneesh@ti.com> Tested-by: Raúl Porcel <armin76@gentoo.org>
* arm, davinci: Change byte order of RTC kick register valuesChristian Riesch2012-01-161-2/+2
| | | | | | | | Now the values in the defines agree with those in the manuals. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de>
* imx: mx6q: add aipstz init for off platform periphJason Liu2012-01-161-0/+11
| | | | | | | | | | | | Init peripheral access control register of AIPSTZ OPACRx: Buffer Writes(BW): 0 -> not bufferable, Supervisor Protect(SP): 0 -> not require supervisor privilege level for accesses. Write Protect(WP): 0 -> allows write accesses. Trusted Protect(TP): 0 -> allows unstrusted master Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de>
* i.mx6:imx6q: allign MAC address with burned-in orderingJason Liu2012-01-161-1/+1
| | | | | | | | | | | | | | | | For the i.mx6q, the burned-in MAC address will be the following odering, fuse: 0x620[7:0] MAC_ADDR[7:0] ---> mac[5] fuse: 0x620[15:8] MAC_ADDR[15:8] ---> mac[4] fuse: 0x620[23:16] MAC_ADDR[23:16] ---> mac[3] fuse: 0x620[31:24] MAC_ADDR[31:24] ---> mac[2] fuse: 0x630[7:0] MAC_ADDR[39:32] ---> mac[1] fuse: 0x630[15:8] MAC_ADDR[47:40] ---> mac[0] This patch also fix the error caculation for the fuse bank[0] address Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de>
* mx28: Let dram_init be common for mx28Fabio Estevam2012-01-161-0/+2
| | | | | | | | Let dram_init function be a common function, so that other mx28 boards can reuse it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* net: imx: Add multi-FEC support for imx_get_mac_from_fuseFabio Estevam2012-01-161-1/+1
| | | | | | | | | | Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter. This feature is important on mx28 SoC for example that has two FEC ports. Cc: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* gpio: Replace ARM gpio.h with the common API in include/asm-genericJoe Hershberger2012-01-091-37/+1
| | | | | | | | | | | | | | | | ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and extended to the new mxs_gpio.c. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* tegra: Add support for UART init in cpu board.cSimon Glass2011-12-241-0/+30
| | | | | | | | | | We add a way of initialising the selected of UARTs prior to relocation. Boards can use the board_init_uart_f() instead of repeating this code themselves. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add a function mux featureSimon Glass2011-12-241-0/+41
| | | | | | | | | | | | funcmux permits selection of config options for particular peripherals, such as the pins that are used for that peripheral, if there are several options. Add UART selection to start with. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add clock_ll_start_uart() to enable UART prior to relocSimon Glass2011-12-241-0/+11
| | | | | | | | | | Most boards will want to enable a UART early. This function provides that feature in Tegra architecture code so the code does not need to be copied on every board. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Move tegra2_mmc_init() prototype to public header.Thierry Reding2011-12-241-0/+27
| | | | | | | | | | | | | tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of the Tegra2-based boards will need to call it, this commit exports it in the new public asm/arch/mmc.h header file to prevent each board from providing its own prototype. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Implement SPI / UART GPIO switchSimon Glass2011-12-241-0/+46
| | | | | | | | | | | | | | | | The Tegra2 Seaboard has the unfortunate feature that SPI and the console UART are multiplexed on the same pins. We need to switch between one and the other during SPI and console activity. This new file implements a switch and keeps track of which peripheral owns the pins. It also flips over the controlling GPIO as needed Since we are adding a second file to board/nvidia/common, we create a proper Makefile there and remove the direct board.o include from board/nvidia/seaboard/Makefile Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Add SPI driver for Tegra2 SOCTom Warren2011-12-242-0/+77
| | | | | | | This driver supports SPI on Tegra2, running at 48MHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* omap4_panda: Initialize the USB phyChris Lalancette2011-12-191-0/+63
| | | | | | | | | | During misc_init_r, make sure to setup the clocks properly for the USB hub on the pandaboard. With this in place, the USB hub and the ethernet works on the pandaboard. Signed-off-by: Chris Lalancette <clalancette@gmail.com> Acked-by: Aneesh V <aneesh@ti.com>
* Coding Style cleanupWolfgang Denk2011-12-191-1/+0
| | | | | | | Fix trailing white space, indentation by spaces instead of TABs, excessive blank lines, trailing blank lines. Signed-off-by: Wolfgang Denk <wd@denx.de>
* usb:gadget:s5p Enable the USB Gadget framework at Exynos4210 (C210 Universal)Lukasz Majewski2011-12-161-0/+1
| | | | | | | | | | This commit enables support for USB Gadgets on the Exynos4210 (C210 Universal) reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> CC: Remy Bohmer <linux@bohmer.net>
* USB: MX5: add helper functions to enable USB clocksWolfgang Grandegger2011-12-112-0/+8
| | | | | | | | | | Signed-off-by: Wolfgang Grandegger <wg@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Remy Bohmer <linux@bohmer.net> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Jason Liu <r64343@freescale.com> V2: Fix spacing in crm_regs.h
* usb:gadget:s5p Enable the USB Gadget framework at GONILukasz Majewski2011-12-111-0/+4
| | | | | | | | | | This commit enables support for USB Gadgets on the GONI reference target. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Remy Bohmer <linux@bohmer.net>
* pxa: convert pxa27x_udc to use read and write functionsStefan Herbrechtsmeier2011-12-111-4/+4
| | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
* pxa: fix usb host register mismatchStefan Herbrechtsmeier2011-12-111-0/+2
| | | | | | Signed-off-by: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Remy Bohmer <linux@bohmer.net>
* i.MX28: Move SPL to arch/arm/cpu/arm926ejs/mx28Marek Vasut2011-12-091-0/+6
| | | | | | | | | | This moves SPL to common location so it can be reused by multiple boards. Also, this commit adjusts M28 SoM to avoid breakage due to the move. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* i.mx: add the initial support for freescale i.MX6Q processorJason Liu2011-12-097-0/+3037
| | | | | | | | i.MX6Q is freescale quad core processors with ARM cortex_a9 complex. This patch is to add the initial support for this processor. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de>
* S5PC2XX: Rename S5pc2XX to exynosChander Kashyap2011-12-0910-47/+47
| | | | | | | | | | | | | | As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15 based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15 based SoC's will be sub-classified as Exynos4 and Exynos5 respectively. In order to better adapt and reuse code across various upcoming Samsung Exynos based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix are renamed as exynos4/EXYNOS4. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: Move CP15 init out of cpu_init_crit()Simon Glass2011-12-091-0/+3
| | | | | | | | | | | | | | | | | | | | Some SOCs have do not start up with their 'main' CPU. The first U-Boot code may then be executed with a CPU which does not have a CP15, or not a useful one. Here we split the initialization of CP15 into a separate call, which can be performed later if required. Once the main CPU is running, you should call cpu_init_cp15() to perform this init as early as possible. Existing ARMv7 boards which define CONFIG_SKIP_LOWLEVEL_INIT should not need to change, this CP15 init is still skipped in that case. The only impact for these boards is that the cpu_init_cp15() will be available even if it is never used on these boards. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warningsAnatolij Gustschin2011-12-061-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Fix: clocks.c: In function 'setup_post_dividers': clocks.c:175: warning: comparison is always true due to limited range of data type clocks.c:177: warning: comparison is always true due to limited range of data type clocks.c:179: warning: comparison is always true due to limited range of data type clocks.c:181: warning: comparison is always true due to limited range of data type clocks.c:183: warning: comparison is always true due to limited range of data type clocks.c:185: warning: comparison is always true due to limited range of data type clocks.c:187: warning: comparison is always true due to limited range of data type clocks.c:189: warning: comparison is always true due to limited range of data type Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com>
* MX: serial_mxc: cleanup removing nasty #ifdefStefano Babic2011-12-065-15/+21
| | | | | | | | | | | | | | | | | | The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* MXS: Add static annotations to dma driverMarek Vasut2011-12-061-25/+0
| | | | | | | | | | | Some functions were internal to the apbh dma driver, so annotate them static. Some of the functions weren't used at all so drop them. This makes the U-Boot binary smaller by about 1500 bytes. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* OMAP3: Add SPL_BOARD_INIT hookTom Rini2011-12-061-0/+4
| | | | | | | | Add an SPL_BOARD_INIT hook and for OMAP3 have it turn on i2c. OMAP4 doesn't need i2c enabled in SPL. Enable SPL_BOARD_INIT on devkit8000. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to omap3_evmTom Rini2011-12-061-0/+26
| | | | | | | Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>. This also changes CONFIG_SYS_TEXT_BASE to 0x80100000. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to BeagleboardTom Rini2011-12-061-0/+29
| | | | | | | | | | | | | | | | | | This introduces 200MHz Micron parts timing information based on x-loader to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation. The memory init logic is also based on what x-loader does in these cases. Note that while previously u-boot would be flashed in with SW ECC in this case it now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to 0x80100000. Cc: Dirk Behme <dirk.behme@gmail.com> Beagleboard rev C5, xM rev A: Tested-by: Tom Rini <trini@ti.com> Beagleboard xM rev C: Tested-by: Matt Ranostay <mranostay@gmail.com> Beagleboard rev B7, C2, xM rev B: Tested-by: Matt Porter <mporter@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Add identify_nand_chip functionTom Rini2011-12-061-0/+1
| | | | | | | | | | A number of boards are populated with a PoP chip for both DDR and NAND memory. Other boards may simply use this as an easy way to identify board revs. So we provide a function that can be called early to reset the NAND chip and return the result of NAND_CMD_READID. All of this code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Rework memory initalization and devkit8000 supportTom Rini2011-12-062-26/+2
| | | | | | | | | This changes to making the board be responsible for providing the memory initialization timings in SPL and converts the devkit8000 to this framework. In SPL we try and initialize both CS0 and CS1. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Suffix all Micron memory timing parts with their speedTom Rini2011-12-061-10/+11
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add optimal SDRC autorefresh control valuesTom Rini2011-12-061-5/+11
| | | | | | | | This adds the optimal SDRC autorefresh control register values for 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this to provide the default 165MHz value. Signed-off-by: Tom Rini <trini@ti.com>
* omap3: mem: Add MCFG helper macroTom Rini2011-12-061-16/+30
| | | | | | | | | This adds an MCFG macro to calculate the correct value, similar to the ACTIMA/ACTIMB macros and adds a comment that all of the potential values here are documented in the TRM. Then we convert the Micron value to use this macro. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Remove get_mem_type prototypeTom Rini2011-12-061-1/+0
| | | | | | This function doesn't exist for omap3 Signed-off-by: Tom Rini <trini@ti.com>
* omap3: mem: Comment enable_gpmc_cs_config moreTom Rini2011-12-061-0/+4
| | | | | | | Expand the "enable the config" comment to explain what the bit shifts are and define out two of the magic numbers. Signed-off-by: Tom Rini <trini@ti.com>
* arm, davinci, da850: add uart1 tx rx pinmux configHeiko Schocher2011-12-061-0/+1
| | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Tom Rini <trini@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, davinci: move davinci_rtc struct to hardware.hHeiko Schocher2011-12-061-0/+39
| | | | | | | | | move struct davinci_rtc to arch/arm/include/asm/arch-davinci/hardware.h and add RTC_KICK0R_WE, RTC_KICK1R_WE defines, so they are global useable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* arm, da850: Add pinmux configurations to the arch treeChristian Riesch2011-12-061-0/+50
| | | | | | | | | | | | | Up to now nearly every davinci board has separate code for the definition of pinmux configurations. This patch adds pinmux configurations for the DA850 SoCs to the arch tree which may later be used for all DA850 based boards. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* arm, davinci: Move pinmux functions from board to arch treeChristian Riesch2011-12-061-0/+2
| | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Nick Thompson <nick.thompson@ge.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Nick Thompson <nick.thompson@ge.com>
* AM3517: move AM3517 specific mux defines to generic headerIlya Yanok2011-12-061-0/+41
| | | | | | | AM3517 specific CONTROL_PADCONF_* defines moved from board-specific files to <asm/arch-omap3/mux.h> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* AM35xx: add EMAC supportIlya Yanok2011-12-062-0/+59
| | | | | | AM35xx has DaVinci-compatible EMAC. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: move arch-independent defines to separate headerIlya Yanok2011-12-061-289/+0
| | | | | | | | | | | DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs also. This patch moves common defines from arch-davinci/emac_defs.h to drivers/net/davinci_emac.h DaVinci specific PHY drivers hacked to include the new header. We might want to switch to phylib in future. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* omap4460: add ES1.1 identificationAneesh V2011-12-062-0/+3
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* start.S: remove omap3 specific code from start.SAneesh V2011-12-061-0/+1
| | | | | | | Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Tom Rini <trini@ti.com>
* PXA: Rename pxa_dram_init to pxa2xx_dram_initMarek Vasut2011-12-061-1/+1
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Export cpu_is_ and pxa_dram_init functionsMarek Vasut2011-12-061-0/+29
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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