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| * | mx28: Fix typo in POWER_MINPWR_VBG_OFFMarek Vasut2012-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The POWER_MINPWR_VBG_OFF bit in mx28 power supply block is not called POWER_MINPWR_FBG_OFF, but POWER_MINPWR_VBG_OFF. Correct the name in the header file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | mx5: Align SPI CS naming with i.MX53 reference manualFabio Estevam2012-11-191-3/+3
| | | | | | | | | | | | | | | | | | Align SPI chip select naming with i.MX53 reference manual. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | ehci-mxc: Add support for i.MX35Benoît Thébaudeau2012-11-161-0/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | ehci-mxc: Define host offsetsBenoît Thébaudeau2012-11-162-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | mx31: Move EHCI definitions to ehci-fsl.hBenoît Thébaudeau2012-11-161-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | | arm: Add control over cachability of memory regionsSimon Glass2012-11-191-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for adjusting the L1 cache behavior by updating the MMU configuration. The mmu_set_region_dcache_behaviour() function allows drivers to make these changes after the MMU is set up. It is implemented only for ARMv7 at present. This is needed for LCD support, where we want to make the LCD frame buffer write-through (or off) rather than write-back. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Add SOC support for display/lcdWei Ni2012-11-192-0/+697
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Add support for PWMSimon Glass2012-11-191-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Use const for pinmux_config_pingroup/table()Simon Glass2012-11-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | These two functions don't actually modify their arguments so add a const keyword. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | SPI: Add SPI Driver for EXYNOS.Rajeshwari Shinde2012-11-151-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPI driver for EXYNOS. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: jy0922.shim@samsung.com Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS5: Add base address for SPIHatim RV2012-11-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add base address definition for SPI device on Exynos. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add clock for SPIHatim RV2012-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add api to calculate and set the clock for SPI channels Signed-off-by: James Miller <jamesmiller@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS5: Add pinmux support for SPIRajeshwari Shinde2012-11-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinmux support for SPI channels Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add clock for I2SRajeshwari Shinde2012-11-152-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock support for I2S Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add I2S base addressRajeshwari Shinde2012-11-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds base address for I2S Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add pinmux for I2SRajeshwari Shinde2012-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinmux support for I2S1 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add parameters required by I2SRajeshwari Shinde2012-11-151-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the audio parameters required by the I2S to play the predefined audio data. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add I2S registersRajeshwari Shinde2012-11-151-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add I2S registers Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | ARCH: EXYNOS: add support to match product idMinkyu Kang2012-11-151-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Based upon single SoC there can be multiple variants. This patch add support to match the complete product ID. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* | | arm:exynos4:pinmux: Modify the gpio function for mmcPiotr Wilczek2012-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add pinmux settings for Exynos4 for mmc0 and mmc2 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | gpio:fix: Proper handling of GPIO subsystem parts at Samsung devicesŁukasz Majewski2012-11-152-1/+25
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Now proper GPIO parts numbering is handled at Samsung devices. This fix is necessary for code using GPIO located at other banks than first. Test HW: - Exynos4210 - Trats - S5PC110 - goni Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | arch-mx6: add mx6dl_pins.hTroy Kisky2012-11-101-0/+149
| | | | | | | | | | | | | | Only the values used in the sabrelite board are added currently. Add more as other boards use them. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | imx-common: cpu: add imx_ddr_sizeTroy Kisky2012-11-102-0/+2
| | | | | | | | | | | | | | | | | | | | Read memory setup registers to determine size of available ram. This routine works for mx53/mx6x I need this because when mx6solo called get_ram_size with a too large maximum size, the system hanged. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololiteTroy Kisky2012-11-103-2/+18
| | | | | | | | | | | | | | | | | | | | Previously, the same value was returned for both mx6dl and mx6solo. Check number of processors to differeniate. Also, a freescale patch says that sololite has its cpu/rev stored at 0x280 instead of 0x260. I don't have a sololite to verify. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | Merge git://git.denx.de/u-bootStefano Babic2012-11-1022-1932/+333
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| * Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-11-031-0/+5
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| | * arm bootm: Allow to pass board specified atagsPali Rohár2012-10-301-0/+5
| | | | | | | | | | | | | | | | | | Board can implement function setup_board_tags which is used for adding atags Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
| * | tegra: move to common SPL frameworkAllen Martin2012-10-291-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change tegra SPL to use common SPL framework. Any tegra specific initialization is now done in spl_board_init() instead of board_init_f()/board_init_r(). Only one SPL boot target is supported on tegra, which is boot to RAM image. jump_to_image_no_args() must be overridden on tegra so the host CPU can be initialized. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-10-278-130/+1195
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| * | | arm: Remove support for NETARMMarek Vasut2012-10-268-1279/+1
| | | | | | | | | | | | | | | | | | | | | | | | This stuff has been rotting in the tree for a while now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | arm: Remove support for s3c4510Marek Vasut2012-10-261-272/+0
| | | | | | | | | | | | | | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | arm: Remove support for lpc2292Marek Vasut2012-10-263-340/+0
| | | | | | | | | | | | | | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-10-267-60/+318
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| | * | am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbersPeter Korsgaard2012-10-251-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | So other parts can be added. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| | * | am33xx: support board specific ddr settingsPeter Korsgaard2012-10-251-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the hardcoded ddr2/ddr3 settings for the ti boards to board code, so other boards can use different types/timings. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Make apply with rtc32k_enable() in the file] Signed-off-by: Tom Rini <trini@ti.com>
| | * | am33xx: move generic parts of pinmux handling out from board/ti/am335xPeter Korsgaard2012-10-251-0/+261
| | | | | | | | | | | | | | | | | | | | | | | | So they are available for other boards. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| | * | am33xx: move ti i2c baseboard header handling to board/ti/am335x/Peter Korsgaard2012-10-251-27/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c header is specific to ti(-derived) boards, and not generic for all am335x boards. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Make re-apply with rtc32k_enable() applied] Signed-off-by: Tom Rini <trini@ti.com>
| | * | am33xx: Add SPI SPL as an optionTom Rini2012-10-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required config.mk logic for this SoC as well as the BOOT_DEVICE define. Finally, enable the options on the am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| | * | VIDEO: add macro to set LCD size for DSS driverStefano Babic2012-10-251-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| | * | am335x: Enable RTC 32K OSC clockVaibhav Hiremath2012-10-252-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support low power state, you must source kernel system timers to persistent clock, available across suspend/resume. In case of AM335x device, the only source we have is, RTC32K, available in wakeup/always-on domain. Having said that, during validation it has been observed that, RTC clock need couple of seconds delay to stabilize the RTC OSC clock; and such a huge delay is not acceptable in kernel especially during early init and also it will impact quick/fast boot use-cases. So, RTC32k OSC enable dependency has been shifted to SPL/first-bootloader. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
| * | | arm: Change global data baudrate to intSimon Glass2012-10-192-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | This does not need to be a long, so change it. Also adjust bi_baudrate to be unsigned. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com>
* | | mx25: Place common functions into sys_proto.hFabio Estevam2012-10-262-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | imx-regs.h is meant to contain SoC register definitions. Common SoC funtions should go to sys_proto.h instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | MX35: add support for woodburn boardStefano Babic2012-10-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The woodburn board is based on the MX35 SOC. Support for both external (NOR) and internal (SD Card) boot mode are added. It uses the generic SPL framework to implement the internal boot mode. The following peripherals are supported: - Ethernet (FEC) - SD Card - NAND (512 MB) - NOR Flash In the internal boot mode, a simple imximage header is generated to set the address in internal RAM where the SOC must copy the SPL code. The initial setup is then demanded to the SPL itself. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | MX35: Add soc_boot_mode and soc_boot_device to MX35Stefano Babic2012-10-262-0/+69
| | | | | | | | | | | | | | | | | | | | | The functions are required to use the generic SPL Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | MX35: add LOW_LEVEL_SRAM_STACK to use SPL_FRAMEWORKStefano Babic2012-10-261-0/+2
| |/ |/| | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* | mx5: lowlevel_init.S: Fix PLL settings for mx53Fabio Estevam2012-10-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz. Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz instead. Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI at 1080p because the IPU clock cannot reach the requested frequency. Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its maximum frequency. Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little bit to allow easier comparison with the original clock setup from FSL U-boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mx25: Clean up imx-regs.hBenoît Thébaudeau2012-10-161-3/+3
| | | | | | | | | | | | | | | | | | | | Clean up i.MX25 imx-regs.h: - Update mx31 imx-regs.h filename. - Test for __KERNEL_STRICT_NAMES just in case. - Define internal RAM size. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* | i.MX6: add HDMI transmitter register declarations from kernel WIP.Eric Nelson2012-10-161-0/+1053
| | | | | | | | | | | | | | | | Original source from Pengutronix HDMI driver work: http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd90785af86f8e46f8ea7b3bb0 Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | i.MX6: set drive strength for parallel RGB padsEric Nelson2012-10-161-29/+29
| | | | | | | | | | | | Default drive strength is disabled and won't function. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | i.MX: iomux: input pad array can be constEric Nelson2012-10-161-1/+2
| | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
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