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* tegra2: Add arch_cpu_init() to fire up Cortex-A9Simon Glass2011-12-092-0/+21
| | | | | | | | | | | | | We want to move away from a special Tegra2 start-up, and just use arch_cpu_init() instead. However, if we run board_init_f() from boot we need to build it for ARMv4T, since the Tegra's AVP start-up CPU does not support ARMv7. The effect of this is to do the AVP init earlier, and in arch_cpu_init(), rather that board_early_init_f(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Fix warnings in arch/arm/cpu/arm920t/s3c24x0/usb_ohci.cSimon Glass2011-12-091-8/+12
| | | | | | | | | | | | | | | | | Sorry if this is already fixed somewhere - I could not find it. This fixes these warnings: usb_ohci.c: In function 'submit_control_msg': usb_ohci.c:1081: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1081: note: initialized from here usb_ohci.c:1084: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1084: note: initialized from here usb_ohci.c:1087: warning: dereferencing pointer 'data_buf.76' does break strict-aliasing rules usb_ohci.c:1087: note: initialized from here Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix GCC 4.6 warningsAnatolij Gustschin2011-12-061-5/+3
| | | | | | | | | | | | | | | | Fix: clocks-common.c: In function 'setup_dplls': clocks-common.c:256:6: warning: variable 'sysclk_ind' set but not used [-Wunused-but-set-variable] clocks-common.c: In function 'setup_non_essential_dplls': clocks-common.c:292:6: warning: variable 'sysclk_ind' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Tom Rini <trini@ti.com>
* arch/arm/cpu/armv7/omap-common/spl.c: Fix GCC 4.2 warningsAnatolij Gustschin2011-12-061-2/+3
| | | | | | | | | | | | | | Fix: spl.c: In function 'jump_to_image_no_args': spl.c:103: warning: assignment makes pointer from integer without a cast spl.c:105: warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: sricharan <r.sricharan@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Tom Rini <trini@ti.com>
* MX: serial_mxc: cleanup removing nasty #ifdefStefano Babic2011-12-061-4/+0
| | | | | | | | | | | | | | | | | | The serial driver for iMX SOCs is continuosly changed if a new SOC or not yet used port is used. CONFIG_SYS_<SOC>_<UART Port> defines were used only to find the base address for the selected UART. Instead of that, move the base address to the board configuration file and drop all #ifdef from driver. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marek.vasut@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Helmut Raiger <helmut.raiger@hale.at> CC: John Rigby <jcrigby@gmail.com> CC: Matthias Weisser <weisserm@arcor.de> CC: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* mx5: Correct a warning in clock.cSimon Glass2011-12-061-1/+1
| | | | | | | | | | | | | This corects the warning below, obtained with my gcc 4.6 compiler. arch/arm/cpu/armv7/mx5/libmx5.o: In function `decode_pll': arch/arm/cpu/armv7/mx5/clock.c:94: undefined reference to `__aeabi_uldivmod' I am not able to test this on MX5x hardware, but it does improve the MAKEALL output for me. You may already have a similar patch, but I cannot see it on the list. Signed-off-by: Simon Glass <sjg@chromium.org>
* OMAP3: Add SPL_BOARD_INIT hookTom Rini2011-12-062-0/+9
| | | | | | | | Add an SPL_BOARD_INIT hook and for OMAP3 have it turn on i2c. OMAP4 doesn't need i2c enabled in SPL. Enable SPL_BOARD_INIT on devkit8000. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Add identify_nand_chip functionTom Rini2011-12-062-0/+90
| | | | | | | | | | A number of boards are populated with a PoP chip for both DDR and NAND memory. Other boards may simply use this as an easy way to identify board revs. So we provide a function that can be called early to reset the NAND chip and return the result of NAND_CMD_READID. All of this code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Rework memory initalization and devkit8000 supportTom Rini2011-12-061-13/+15
| | | | | | | | | This changes to making the board be responsible for providing the memory initialization timings in SPL and converts the devkit8000 to this framework. In SPL we try and initialize both CS0 and CS1. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Change mem_ok to clear again after reading backTom Rini2011-12-061-0/+1
| | | | | | | | It's possible to need to call this function on the same banks multiple times so we want to be sure that 'pos A' is cleared out again at the end. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add a helper function to set timings in SDRCTom Rini2011-12-061-55/+61
| | | | | | | | Since we go through the sequence to setup the SDRC timings more than once, break this logic out into its own function and have that function call mem_ok() to make sure the memory is usable. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()Tom Rini2011-12-061-12/+11
| | | | | | | | | | | | | We update the comment in make_cs1_contiguous() to be a little bit more clear (it's been copy/pasted from other silicons) and then explain in dram_init() why we need to always try this. Note that in the previous behavior we were always calling this on boards that never had cs1 populated anyhow so making sure we do this always is fine and will correct things like omap3evm detecting an invalid amount of memory (384MB). Signed-off-by: Tom Rini <trini@ti.com>
* omap3: mem: Comment enable_gpmc_cs_config moreTom Rini2011-12-061-3/+9
| | | | | | | Expand the "enable the config" comment to explain what the bit shifts are and define out two of the magic numbers. Signed-off-by: Tom Rini <trini@ti.com>
* arm, davinci: move misc function in arch treeHeiko Schocher2011-12-062-1/+151
| | | | | | | | | | | | move the board/davinci/common/misc.c file to arch/arm/cpu/arm926ejs/davinci/misc.c, so all davinci boards can use this functions. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, davinci, da850: add uart1 tx rx pinmux configHeiko Schocher2011-12-061-0/+5
| | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Tom Rini <trini@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Christian Riesch <christian.riesch@omicron.at>
* arm, davinci: Remove duplication of pinmux configuration codeChristian Riesch2011-12-061-28/+8
| | | | | | | | | | This patch replaces the pinmux configuration code in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c by the code from arch/arm/cpu/arm926ejs/davinci/pinmux.c. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
* arm, da850: Add pinmux configurations to the arch treeChristian Riesch2011-12-062-0/+167
| | | | | | | | | | | | | Up to now nearly every davinci board has separate code for the definition of pinmux configurations. This patch adds pinmux configurations for the DA850 SoCs to the arch tree which may later be used for all DA850 based boards. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
* arm, davinci: Move pinmux functions from board to arch treeChristian Riesch2011-12-062-1/+106
| | | | | | | | | | | | | Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Nick Thompson <nick.thompson@ge.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Nick Thompson <nick.thompson@ge.com>
* arm, arm926ejs: always do cpu critical initsHeiko Schocher2011-12-061-4/+2
| | | | | | | | | | | | | always do the cpu critical inits in cpu_init_crit, and only jump to lowlevel_init, if CONFIG_SKIP_LOWLEVEL_INIT is not defined. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at>
* AM35xx: add EMAC supportIlya Yanok2011-12-062-0/+45
| | | | | | AM35xx has DaVinci-compatible EMAC. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* arm926ejs: add noop implementation for dcache opsIlya Yanok2011-12-062-1/+76
| | | | | | | | Added noop implementation for dcache operations that will buzz about missing real implementation and disable the dcache. This fixes compilation of DaVinci EMAC driver on arm926ejs. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* davinci_emac: move arch-independent defines to separate headerIlya Yanok2011-12-064-0/+4
| | | | | | | | | | | DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs also. This patch moves common defines from arch-davinci/emac_defs.h to drivers/net/davinci_emac.h DaVinci specific PHY drivers hacked to include the new header. We might want to switch to phylib in future. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* omap4: fix IO settingAneesh V2011-12-061-1/+6
| | | | | | | | | | | | The value from TRIM is not working for some 4430 silicons. So, override with hw team recommended value. However, for 4460 TRIM value shall be used as long as the part is trimmed This fixes boot problem on some OMAP4430 ES2.0 Panda boards out there. Cc: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4460: add ES1.1 identificationAneesh V2011-12-061-1/+9
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4: emif: fix error in driverAneesh V2011-12-061-2/+2
| | | | | | | | | | There was a typo in the EMIF driver. It went un-noticed because it affected only when automatic detection is enabled and even then half the memory was configured and identified properly. Reported-by: Rockefeller <rockefeller.lin@innocomm.com> Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: remove I2C from SPLAneesh V2011-12-061-1/+0
| | | | | | | Due to some recent changes I2C is no longer required in SPL. Remove the i2c_init() call to save some space Signed-off-by: Aneesh V <aneesh@ti.com>
* omap4460: fix TPS initializationAneesh V2011-12-061-8/+0
| | | | | | | | | | | TPS power IC is controlled using a GPIO (gpio_wk7). This GPIO should be maintained at logic 1 always. As such an internal pull-up on this pin will do the job, driving the GPIO outuput is not needed. This will avoid the need of using GPIO library in SPL and also may save some power. Signed-off-by: Aneesh V <aneesh@ti.com>
* start.S: remove omap3 specific code from start.SAneesh V2011-12-062-23/+8
| | | | | | | Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Tom Rini <trini@ti.com>
* armv7: setup vectorAneesh V2011-12-061-0/+17
| | | | | | | | The vector is not correctly setup in armv7 except for OMAP3. Correcting this. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: include armv7/cpu.c in SPL buildAneesh V2011-12-061-2/+2
| | | | | | | | | This allows SPL to have default implementation of save_boot_params(), useful for SoCs that do not intend to override this default implementation Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: disable L2 cache in cleanup_before_linux()Aneesh V2011-12-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | We were not disabling external caches before jumping to kernel. We were flushing all caches including external caches and disabling caches globally in CP15 System Control register. Apparently this is not enough. The bootstrap loader in Linux kernel that does decompression enables data-caches again, flush them after use and disable them before jumping to kernel proper. However, it's not aware of the external caches. Since we have left external cache enabled, external cache will get used once caches are enabled globally, but it's not flushed because decompressor is not aware of external caches. When it jumps to kernel with caches disabled globally, we have stale data in the external cache and a coherency problem. This was breaking the boot for OMAP4 with latest mainline kernel. The solution is to disable external caches in cleanup_before_linux(). With this fix kernel is booting again. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
* arm, arm926ejs: Fix clear bss loop for zero length bssChristian Riesch2011-12-061-3/+5
| | | | | | | | This patch fixes the clear bss loop for bss sections that have zero length, i.e., where __bss_start == __bss_end__. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* PXA: Rename pxa_dram_init to pxa2xx_dram_initMarek Vasut2011-12-061-2/+2
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Replace timer driverMarek Vasut2011-12-061-52/+35
| | | | | | This new timer driver shall conform to new Timer API. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Add cpuinfo display for PXA2xxMarek Vasut2011-12-062-0/+134
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Separate PXA2xx CPU initMarek Vasut2011-12-062-73/+31
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]XMarek Vasut2011-12-064-20/+20
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: Re-add the Dcache locking as RAM for pxa250Marek Vasut2011-12-062-2/+116
| | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* PXA: Rework start.S to be closer to other ARMsMarek Vasut2011-12-062-247/+153
| | | | | | | | | | The start.S on PXA was very obscure. This reworks it back to be close to arm1136 start.S and others. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> V2: Don't compile in relocation support if building SPL
* OMAP3: Use sdelay from arch/arm/cpu/armv7/syslib.c instead of cloning that.Alexander Holler2011-11-291-11/+1
| | | | | | | | There is no need to have such a function twice. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Acked-by: Dirk Behme <dirk.behme@googlemail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* Fix Stelian's email addressStelian Pop2011-11-2911-11/+11
| | | | | | | Change my old email address which is no longer valid. Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* Merge branch 'hs@denx.de' of git://git.denx.de/u-boot-stagingWolfgang Denk2011-11-231-2/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'hs@denx.de' of git://git.denx.de/u-boot-staging: drivers/net/dnet.c: Fix GCC 4.6 warnings board/xaeniax/flash.c: Fix GCC 4.6 warnings net/bootp.c: Fix GCC 4.6 warning common/cmd_bootm.c: Fix GCC 4.6 warnings board/mx1ads/mx1ads.c: Fix GCC 4.6 warning board/mx1ads/syncflash.c: Fix GCC 4.6 warnings board/lubbock/flash.c: Fix GCC 4.6 warnings drivers/net/cs8900.c: Fix GCC 4.6 warning arch/arm/cpu/arm926ejs/omap/cpuinfo.c: Fix GCC 4.6 warnings drivers/net/lan91c96.c: Fix GCC 4.6 warning board/ronetix/pm9263/pm9263.c: Fix GCC 4.6 warning drivers/mtd/onenand/samsung.c: Fix GCC 4.6 warning drivers/usb/musb/musb_hcd.c: Fix GCC 4.6 warning
| * arch/arm/cpu/arm926ejs/omap/cpuinfo.c: Fix GCC 4.6 warningsAnatolij Gustschin2011-11-231-2/+3
| | | | | | | | | | | | | | | | | | | | | | Fix: cpuinfo.c: In function 'print_cpuinfo': cpuinfo.c:155:6: warning: variable 'system_serial_low' set but not used [-Wunused-but-set-variable] cpuinfo.c:154:6: warning: variable 'system_serial_high' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | arch/arm/cpu/armv7/s5p-common/pwm.c: fix GCC 4.6 warningAnatolij Gustschin2011-11-161-2/+0
| | | | | | | | | | | | | | | | | | Fix: pwm.c: In function 'pwm_config': pwm.c:85:16: warning: variable 'timer_rate_hz' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | arm, davinci: da850/dm365 lowlevel cleanupHeiko Schocher2011-11-152-124/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Cleanup a lot of fix values, and use defines instead. - Also make some values configurable through the board config file. - delete the NAND_SPL code for da850, as it is not used actually - remove the asm code Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap4/5: Add support for booting with CH.Sricharan2011-11-156-41/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configuration header(CH) is 512 byte header attached to an OMAP boot image that will help ROM code to initialize clocks, SDRAM etc and copy U-Boot directly into SDRAM. CH can help us in by-passing SPL and directly boot U-boot, hence it's an alternative for SPL. However, we intend to support both CH and SPL for OMAP4/5. Initialization done through CH is limited and is not equivalent to that done by SPL. So U-Boot has to distinguish between the two cases and handle them accordingly. This patch takes care of doing this. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap5: emif: Add emif/ddr configurations required for omap5 evmSricharan2011-11-158-213/+514
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the emif configurations required for omap5 soc.Add the correct ddr part configurations required for omap5 evm board. EDB8164B3PH from ELPIDA is the part used on the board. Also changes are done to retain some part of the code common for OMAP4/5 and keep only the remaining in the Soc specific directories. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap5: clocks: Add clocks support for omap5 platform.Sricharan2011-11-156-470/+991
| | | | | | | | | | | | | | | | | | | | | | | | Adding the correct configurations required for dplls, clocks, for omap5 Soc. Also changes are done to retain some part of the code common for OMAP4/5 and move only the remaining to the Soc specific directories. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap5: Add minimal support for omap5430.Sricharan2011-11-1511-319/+362
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the minimal support for OMAP5. The platform and machine specific headers and sources updated for OMAP5430. OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Also moved some part of code from the basic platform support that can be made common for OMAP4/5. Rest is kept out seperately. The same approach is followed for clocks and emif support in the subsequent patches. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap4: make omap4 code common for future reuseSricharan2011-11-157-9/+16
| | | | | | | | | | | | | | | | | | Much of omap4 soc support code can be reused for omap5. Move them to the omap-common directory to facilitate this. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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