| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | ARM: Align stack to 8 bytes | Vitaly Kuzmichev | 2010-06-22 | 1 | -4/+2 | |
| | | | | | | | | | | | | | | The ARM ABI requires that the stack be aligned to 8 bytes as it is noted in Procedure Call Standard for the ARM Architecture: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html Unaligned SP also causes the problem with variable-length arrays allocation when VLA address becomes less than stack pointer during aligning of this address, so the next 'push' in the stack overwrites first 4 bytes of VLA. Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com> | |||||
| * | PXA: Align stack to 8 bytes | Marek Vasut | 2010-06-13 | 1 | -1/+4 | |
| | | | | | | | | | | | | | | | | | | | | | | Part of this patch is by: Mikhail Kshevetskiy. Stack must be aligned to 8 bytes on PXA (possibly all armv5te) for LDRD/STRD instructions. In case LDRD/STRD is issued on an unaligned address, the behaviour is undefined. The issue was observed when working with the NAND code, which was rendered disfunctional. Also, the vsprintf() function had serious problems with printing 64bit wide long longs. After aligning the stack, this wrong behaviour is no longer present. Tested on: Marvell Littleton PXA310 board Toradex Colibri PXA320 board Aeronix Zipit Z2 PXA270 handheld Voipac PXA270 board Signed-off-by: Marek Vasut <marek.vasut@gmail.com> | |||||
| * | arm: Move cpu/$CPU to arch/arm/cpu/$CPU | Peter Tyser | 2010-04-13 | 9 | -0/+1895 | |
| Signed-off-by: Peter Tyser <ptyser@xes-inc.com> | ||||||
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| Blackbird™ U-Boot sources for OpenBMC | Raptor Computing Systems |
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