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* Timer: Remove reset_timer() for non-Nios2 archesGraeme Russ2011-07-264-20/+0
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* Timer: Remove set_timer completelyGraeme Russ2011-07-265-25/+0
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* replace CONFIG_PRELOADER with CONFIG_SPL_BUILDAneesh V2011-07-261-3/+3
| | | | | | replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD Signed-off-by: Aneesh V <aneesh@ti.com>
* ARM: MX5: Fix broken leftover TO-2 errata workaroundDavid Jander2011-07-181-1/+5
| | | | | | | | This check was broken. r3 does not contain the silicon revision anymore, so we need to reload it. Also, this errata only applies to i.MX51. Signed-off-by: David Jander <david@protonic.nl> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7Rob Herring2011-07-171-0/+2
| | | | | | | | cpu_init_crit can be skipped, but the code is still enabled requiring a platform to supply lowlevel_init. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Albert ARIBAUD <albert.aribaud@free.fr>
* MX5: Update to autogenerated asm-offsets.hStefano Babic2011-07-142-0/+78
| | | | | | | On i.MX5, the asm-offsets.h file is not yet generated as it should be. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Matthias Weisser <weisserm@arcor.de>
* MX5: Introduce a function for setting the chip select sizeFabio Estevam2011-07-041-0/+30
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* OMAP[34]: fix broken timerJohn Rigby2011-07-041-3/+4
| | | | | | | | | | | | | | | | | | | | As implemented now the timer used to implement __udelay counts to 0xffffffff and then gets stuck there because the the programmed reload value is 0xffffffff. This value is not only wrong but illegal according to the reference manual. One can reproduce the bug by leaving a board at the u-boot prompt for sometime then issuing a sleep command. The sleep will hang forever. The timer is a count up timer that reloads as it rolls over from 0xffffffff so the correct load value is 0. Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff. Signed-off-by: John Rigby <john.rigby@linaro.org> Tested-by: Igor Grinberg <grinberg@compulab.co.il>
* armv7: adapt s5pc1xx to the new cache maintenance frameworkAneesh V2011-07-041-82/+6
| | | | | | adapt s5pc1xx to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap3 to the new cache maintenance frameworkAneesh V2011-07-044-283/+149
| | | | | | adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: adapt omap4 to the new cache maintenance frameworkAneesh V2011-07-042-0/+21
| | | | | | adapt omap4 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: integrate cache maintenance supportAneesh V2011-07-042-27/+38
| | | | | | | | | | - Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework Signed-off-by: Aneesh V <aneesh@ti.com>
* armv7: rename cache related CONFIG flagsAneesh V2011-07-041-3/+0
| | | | | | | | | | | | | | | | Replace the cache related CONFIG flags with more meaningful names. Following are the changes: CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF Signed-off-by: Aneesh V <aneesh@ti.com> V2: * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE V4: * Changed all three flags to the final names suggested as above and accordingly changed the commit message
* armv7: cache maintenance operations for armv7Aneesh V2011-07-042-1/+395
| | | | | | | | | | | | | | | | | | | | | | | | | | - Add a framework for layered cache maintenance - separate out SOC specific outer cache maintenance from maintenance of caches known to CPU - Add generic ARMv7 cache maintenance operations that affect all caches known to ARMv7 CPUs. For instance in Cortex-A8 these opertions will affect both L1 and L2 caches. In Cortex-A9 these will affect only L1 cache - D-cache operations supported: - Invalidate entire D-cache - Invalidate D-cache range - Flush(clean & invalidate) entire D-cache - Flush D-cache range - I-cache operations supported: - Invalidate entire I-cache - Add maintenance functions for TLB, branch predictor array etc. - Enable -march=armv7-a so that armv7 assembly instructions can be used Signed-off-by: Aneesh V <aneesh@ti.com>
* Minor coding style cleanupWolfgang Denk2011-06-021-3/+3
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* armv7: Add ST-Ericsson u8500 archJohn Rigby2011-06-014-0/+291
| | | | | | | | Based on ST-Ericsson internal git repo. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> CC: Albert Aribaud <albert.aribaud@free.fr>
* S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)Minkyu Kang2011-05-261-20/+26
| | | | | | | The source of pwm clock is fixed at evt1. And some registers for pwm clock are removed. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: add set_mmc_clk for external clock controlJaehoon Chung2011-05-262-0/+37
| | | | | | | | | | | This patch added set_mmc_clk for external clock control. c210 didn't support host clock control. So We need external_clock_control function for c210. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5PC2XX: Support the cpu revisionMinkyu Kang2011-05-261-0/+2
| | | | | | | | S5PC210 SoC have two cpu revisions, and have some difference. So, support the cpu revision for each revision. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5P:SROM config code moved to s5p-common directoryChander Kashyap2011-05-263-13/+13
| | | | | | | | | SROM config code is made common for S5P series of boards. smdkc100.c now refers to s5p-common/sromc.c for SROM related subroutines. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* MX53: Handle silicon revision 2.1 caseFabio Estevam2011-05-231-7/+3
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Minor coding style cleanup.Wolfgang Denk2011-05-191-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARMV7: OMAP3: Cleanup extern variables in mem.cLuca Ceresoli2011-04-271-32/+0
| | | | | | | | | | | | Removed boot_flash_* extern variables. boot_flash_type was totally unused. The other ones were actually constants, so they have been replaced with #defines in the board config files. Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm: Tegra2: Add missing PLLX initTom Warren2011-04-271-0/+29
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Tegra2: add support for A9 CPU initTom Warren2011-04-275-1/+540
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARMV7: OMAP3: Fix preprocessor check for CONFIG_OMAP34XXLuca Ceresoli2011-04-271-1/+1
| | | | | | | | | | CONFIG_OMAP34XX must be checked for existence, not value. Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP3: Add support for DPLL5 (usbhost)Alexander Holler2011-04-272-0/+42
| | | | | Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* MX5: factor out boot cause funciton to common codeJason Liu2011-04-271-0/+28
| | | | | | | factor out boot cause function to common code to avoid the duplicate code in each board support package Signed-off-by: Jason Liu <jason.hui@linaro.org>
* S5P: timer: replace bss variable by gdMinkyu Kang2011-03-271-15/+12
| | | | | | | | | | | | Use the global data instead of bss variable, replace as follow. count_value -> removed timestamp -> tbl lastdec -> lastinc Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Albert ARIBAUD <albert.aribaud@free.fr>
* S5P: timer: Use pwm functionsMinkyu Kang2011-03-271-44/+5
| | | | | | Use pwm functions for timer that is PWM timer 4. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: S5P: pwm driver supportDonghwa Lee2011-03-272-0/+190
| | | | | | | | This is common pwm driver of S5P. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: fix incorrect monitor protection region in FLASHPo-Yu Chuang2011-03-272-0/+6
| | | | | | | | | | | Monitor protection region in FLASH did not cover .rel.dyn and .dynsym sections, because it uses __bss_start to compute monitor_flash_len. Use _end instead. Add _end to linker scripts for end of u-boot image Add _end_ofs to all the start.S. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* rename _end to __bss_end__Po-Yu Chuang2011-03-272-2/+2
| | | | | | | Currently, _end is used for end of BSS section. We want _end to mean end of u-boot image, so we rename _end to __bss_end__ first. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* arm: Tegra2: Add basic NVIDIA Tegra2 SoC supportTom Warren2011-02-216-0/+386
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* armv7: add support for S5PC210 SoCMinkyu Kang2011-02-023-0/+292
| | | | | | | S5PC210 is a 32-bit RISC and Cortex-A9 Dual Core based micro-processor. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* ARM: */start.S: code cleanupLiu Hui-R643432011-02-021-2/+0
| | | | | | | Remove the useless code from start.S Signed-off-by: Jason Liu <r64343@freescale.com> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
* armv7: s5pc1xx: don't use function pointer for clock functionsMinkyu Kang2011-02-022-17/+23
| | | | | | | | Because of the bss area is cleared after relocation, we've lost pointers. This patch fixed it. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* MX5: Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bssStefano Babic2011-02-021-2/+4
| | | | | | | | | | The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. This patch is the same as recently applied for arm926js architecture. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de>
* MX5: Add initial support for MX53 processorLiu Hui-R643432011-02-023-47/+96
| | | | | | | | | | Add initial support for Freescale MX53 processor, - Add the iomux support and the pin definition, - Add the regs definition, clean up some unused def from mx51, - Add the low level init support, make use the freq input of setup_pll macro Signed-off-by: Jason Liu <r64343@freescale.com>
* Move DECLARE_GLOBAL_DATA_PTR to file scopeJohn Rigby2010-12-211-2/+4
| | | | | | | | | | | | | | | It can be optimised out by the compiler otherwise resulting in obscure errors like a board not booting. This has been documented in README since 2006 when these were first fixed up for GCC 4.x. Signed-off-by: John Rigby <john.rigby@linaro.org> Fix some additional places. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
* ARM: */start.S: use canonical asm syntaxWolfgang Denk2010-12-131-1/+1
| | | | | | Make code build with older tool chains. Signed-off-by: Wolfgang Denk <wd@denx.de>
* omap3: emif|sdrc: use a single global data defineNishanth Menon2010-12-112-4/+2
| | | | | | | | DECLARE_GLOBAL_DATA_PTR declarations in functions are inherently troublesome with various compilers (e.g. gcc 4.5) Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP: Timer: Replace bss variable by gdDirk Behme2010-12-111-11/+11
| | | | | | | | | | | | | | | | | Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the OMAP timer driver. The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Tested-by: Steve Sakoman <steve.sakoman@linaro.org> Tested-by: John Rigby <john.rigby@linaro.org> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-12-091-0/+14
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| * imx: Get fec mac address from fuseLiu Hui-R643432010-11-211-0/+14
| | | | | | | | | | | | | | The patch is to support getting FEC MAC address from fuse bank. Signed-off-by: Jason Liu <r64343@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de>
* | armv7: fix relocation skipAndreas Bießmann2010-12-091-2/+2
| | | | | | | | | | | | | | | | | | I doubt the stack_setup() was defective before: we load the current location of _start and compare against destination of relocate_code(). If we are already there we shoud skip the relocation and jump over to clear_bss. Before the clear_bss was also skipped. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm: fixloop(): do not use r8 for relocationAndreas Bießmann2010-12-091-3/+3
| | | | | | | | | | | | | | | | | | r8 is used for global_data and should therefore be left alone! For C code the compiler flag --fixed-r8 does the job, but in assembler we need to be aware of that fact. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm: relocate_code(): do not set register uselessAndreas Bießmann2010-12-091-4/+4
| | | | | | | | | | | | | | | | | | In case we are still at relocation target address before relocation we do not need to load the registers needed for relocation. We should instead skip the whole relocation part and jump over to clear_bss immediately. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm: copy_loop(): use scratch registerAndreas Bießmann2010-12-091-5/+5
| | | | | | | | | | | | | | | | | | This patch uses r1 as scratch register for copy_loop(). Therefore we do not longer need r7 for the storage of relocate_code()'s 'addr_moni' (the destination address of relocation). Therefore r7 can be used later on for other purposes. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm: add 8-byte alignment for ABI compliance before board_init_fHeiko Schocher2010-12-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | suggested from Daniel Hobi<daniel.hobi@schmid-telecom.ch> Tested on following boards: arm1136: qong armv7: omap3_beagle arm926ejs: magnesium, tx25 Signed-off-by: Heiko Schocher <hs@denx.de> cc: Daniel Hobi <daniel.hobi@schmid-telecom.ch> cc: Albert ARIBAUD <albert.aribaud@free.fr>
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