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* OMAP3 SPL: Provide weak omap_rev_stringTom Rini2011-10-271-6/+0
| | | | | | | | | We add an weak version of omap_rev_string in omap-common/spl.c and while at it drop the omap3 version. Move the prototype over to <asm/omap_common.h> with the other SPL functions. Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Fix compile warningSanjeev Premi2011-09-301-1/+1
| | | | | | | | | | Building without option CONFIG_DISPLAY_CPUINFO leads to this warning: sys_info.c:50:14: warning: 'rev_s_37xx' defined but not used Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: implement boot parameter savingSimon Schwarz2011-09-301-2/+7
| | | | | | | Implements the saving of boot params passed by OMAP3 ROM code. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: new SPL structure supportSimon Schwarz2011-09-302-0/+35
| | | | | | | | Support for the new spl structure. Using the interface defined by Aneesh V for OMAP4 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap-common: add nand spl supportSimon Schwarz2011-09-301-2/+48
| | | | | | | Add NAND support for the new SPL structure. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Configure RAM bank 0 if in SPLSimon Schwarz2011-09-301-1/+31
| | | | | | | | | | OMAP3 relied on the memory config done by X-loader or Configuration Header. This has to be reworked for the implementation of a SPL. This patch configures RAM bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000 are added to mem.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Add 37xx ESx revision numbers.Howard D. Gray2011-09-121-1/+12
| | | | | | | | OMAP3: Add 37xx ESx revision numbers. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Signed-off-by: Howard D. Gray <howard.gray@matrix-vision.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* dm3730: enable dpll5Eric Benard2011-09-041-0/+1
| | | | | | | | which is used to provide 120MHz to USB EHCI This allows EHCI to work on BeagleBoard XM Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3:clock: check cpu_family before enabling clks for IVA & CAMVaibhav Hiremath2011-09-041-4/+10
| | | | | | | | | | | In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and ISP-CAMERA modules have been removed. So add check for cpu_family before enabling clocks for these modules, else this impacts subsequent power consumption and system suspend/resume functionality. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3:clock: configure GFX clock to 200MHz for AM/DM37xVaibhav Hiremath2011-09-041-1/+1
| | | | | | | | | | | | AM/DM37x is another OMAP3 variant, where the GFX clock has been boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change. HW Errata: Due to dependency of TV out clock of 54MHz, it is not possible to configure GFX to 192MHz. So as per HW errats, the recommended GFX clock is 200MHz (=CORE_CLK/2). Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: enable caches at system start-upAneesh V2011-09-041-0/+8
| | | | Signed-off-by: Aneesh V <aneesh@ti.com>
* omap: fix gpio related build breaksAneesh V2011-09-041-1/+1
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* omap: reuse omap3 gpio support in omap4Aneesh V2011-08-033-186/+12
| | | | | Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Include array definition only when it is usedSanjeev Premi2011-08-031-0/+3
| | | | | | | | | | | | The array of strings corresponding to cpu revision is used only when CONFIG_DISPLAY_CPUINFO is selected - in the function print_cpuinfo(). Enclose definition of this array in #ifdef...#endif for the same. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* armv7: adapt omap3 to the new cache maintenance frameworkAneesh V2011-07-044-283/+149
| | | | | | adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
* ARMV7: OMAP3: Cleanup extern variables in mem.cLuca Ceresoli2011-04-271-32/+0
| | | | | | | | | | | | Removed boot_flash_* extern variables. boot_flash_type was totally unused. The other ones were actually constants, so they have been replaced with #defines in the board config files. Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP3: Add support for DPLL5 (usbhost)Alexander Holler2011-04-272-0/+42
| | | | | Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: emif|sdrc: use a single global data defineNishanth Menon2010-12-112-4/+2
| | | | | | | | DECLARE_GLOBAL_DATA_PTR declarations in functions are inherently troublesome with various compilers (e.g. gcc 4.5) Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* AM3517:EMIF4: fix SDRAM size to 256MbVaibhav Hiremath2010-11-291-2/+3
| | | | | | | | | | With addition of "dram_init_banksize()" function from Heiko,Schocher (commit ID: 561142af20f1fd7b425d9425730014e656defb91), the DRAM size is getting configured wrongly to 512Mb (CS0 & CS1). So fix it to 256Mb. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
* armv7, beagle: Second SDRAM bank don;t workHeiko Schocher2010-11-041-0/+7
| | | | | | | | | | | | | | | since commit 3667cbeed5e3c4067e624e52a916b1ebb02c8f05 on beagle board the second sdram bank didn;t longer work. Since this patch sdram settings just get copied from bank a, but CMD_NOP, CMD_PRECHARGE, CMD_AUTOREFRESH are not executed and after that mr register is also not updated. This patch adds this for the bank b. Signed-off-by: Heiko Schocher <hs@denx.de> cc: Steve Sakoman <steve@sakoman.com> cc: Sandeep Paulraj <s-paulraj@ti.com> cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Drop support for CONFIG_SYS_ARM_WITHOUT_RELOCWolfgang Denk2010-10-292-52/+0
| | | | | | | | | | | | | | | | When this define was introduced, the idea was to provide a soft migration path for ARM boards to get adapted to the new relocation support. However, other recent changes led to a different implementation (ELF relocation), where this no longer works. By now CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it actually hurts because it obfuscates the actual code by sprinkling it with lots of dead and non-working debris. So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC. Signed-off-by: Wolfgang Denk <wd@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-181-1/+1
| | | | | | | | | | | | The change is currently needed to be able to remove the board configuration scripting from the top level Makefile and replace it by a simple, table driven script. Moving this configuration setting into the "CONFIG_*" name space is also desirable because it is needed if we ever should move forward to a Kconfig driven configuration system. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARMV7: OMAP3: Fix bug in get_sdr_cs_offset()Steve Sakoman2010-10-171-1/+1
| | | | | | | | | | | | | This patch fixes a typo in the routine to calculate the cs offset based upon the contents of the SDRC cs_cfg register. This function mistakenly shifts the CS1STARTLOW field 17 bits right instead of 17 bits left. This hasn't been an issue to date because all OMAP3 boards currently are configured to have zeros in this field. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
* ARM: implement relocation for ARM V7 (OMAP)Heiko Schocher2010-09-192-0/+72
| | | | | | | | | | | | Change the implementation for ARM V7 to relocate the code to an arbitrary address in RAM. Adapt the Beagle board (Cortex A8) to test the changes. Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher <hs@denx.de>
* ARM V7 (OMAP): add data cache support, test on Beagle boardHeiko Schocher2010-09-191-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add data cache support for ARM V7 systems. Used cache flush functions from linux:arch/arm/mm/cache-v7.S developed from Catalin Marinas. Enable "cache" command on Beagle board and test performance. Test 1: Loading 127 MB of data from NAND flash into RAM: Instr. Cache off on on Data Cache off off on -------------------------------------------------- Beagle (Cortex A8) 116s 106s 30.3s = x 3.8 Test 2: uncompressing a gzipped image from RAM to RAM (size compressed: 6.5 MiB, uncompressed: 35 MiB): Instr. Cache off on on Data Cache off off on -------------------------------------------------- Beagle (Cortex A8) 1.84s 1.64s 0.12s = x 15.3 Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Ben Gardiner<bengardiner@nanometrics.ca>
* Prepare v2010.09-rc1Wolfgang Denk2010-09-102-2/+0
| | | | | | Coding style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARMV7: OMAP3: Remove erroneous hard coded sdram setup for 128MB/bankSteve Sakoman2010-09-081-22/+21
| | | | | | | | | Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB per bank. This patches uses the SDRC settings from x-load or the config header to set up timing properly. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Apply Cortex-A8 errata workarounds only on affected revisionsMans Rullgard2010-09-081-3/+10
| | | | | | | | | | The workarounds for errata 621766 and 725233 should only be applied on affected Cortex-A8 revisions. Recent chips use r3px cores where these have been fixed. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Convert setup_auxcr() to pure asmMans Rullgard2010-09-082-35/+19
| | | | | | | | | | | This function consists entirely of inline asm statements, so writing it directly in a .S file is simpler. Additionally, the inline asm is not safe as is, since registers are not guaranteed to be preserved between asm() statements. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Fix and clean up L2 cache enable/disable functionsMans Rullgard2010-09-081-54/+21
| | | | | | | | | | | | | | | | On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode, so an SMC call to the ROM monitor is required. On later versions, and on newer devices, this bit is banked and we can set it directly. The code checked only the ES revision of the chip, and hence incorrectly used the ROM call on ES1.0 versions of other devices. This patch adds a check for chip family as well as revision, and also removes some code duplication between the enable and disable functions. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Add clock setup for OMAP36XX/37XXSteve Sakoman2010-09-082-147/+471
| | | | | | | | This patch configures clocks properly when a 36XX/37XX processor is detected. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Update CPU type detection for AM35XX/OMAP36XX/37XXSteve Sakoman2010-09-081-26/+121
| | | | | | | | TI has added new processors to the OMAP3 family. This patch enhances the code in sysinfo.c to detect which family member is present. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Move syslib.c to omap-common since it can be shared by OMAP3 ↵Steve Sakoman2010-09-082-73/+0
| | | | | | | | | | and OMAP4 The functions in syslib.c can be shared, so this patch moves it from cpu/omap3 to cpu/omap-common Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: Add basic support for TI OMAP4Steve Sakoman2010-07-053-176/+0
| | | | | | | | | This patch adds minimum support for OMAP4. Code which can be shared between OMAP3 and OMAP4 is placed in arch/arm/cpu/armv7/omap-common Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7Steve Sakoman2010-07-0513-0/+2605
The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9 Cortex A8 and A9 both belong to the armv7 architecture, hence the name change. The two architectures are similar enough that substantial code can be shared. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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