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* EXYNOS5: support exynos5 lcd clock controlDonghwa Lee2012-09-011-1/+107
| | | | | | | | This patch support exynos5 lcd clock control. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: EXYNOS: fixed compiler warning messageJaehoon Chung2012-09-012-1/+4
| | | | | | | | | | | Removed [-Wuninitialized] warning message. The fout_sel is assigned to "-1" by default. And start, gpio_func is initialized to 0. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5 : Modify pinnumx settings as per Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-011-9/+13
| | | | | | | | | | This patch modifies the pinmux settings of MMC and UART as per Exynos5250 Rev 1.0. It also corrects the gpio offset calculations. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: CLOCK: Add BPLL supportRajeshwari Shinde2012-09-011-7/+21
| | | | | | | | This patch adds support for BPLL clock. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: CLOCK: Modify MPLL clock out for Exynos5250 Rev 1.0Rajeshwari Shinde2012-09-011-1/+11
| | | | | | | | | | | MPLL clock-out of Exynos5250 Rev 1.0 is always at 1.6GHz. Adjust the divisor value to get 800MHz as needed by devices like UART etc Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: PINMUX: Add pinmux support for I2CRajeshwari Shinde2012-07-311-0/+52
| | | | | | | This patch adds pinmux code for I2C. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* EXYNOS: CLK: Add i2c clockRajeshwari Shinde2012-07-311-0/+33
| | | | | | | | | This adds i2c clock information for EXYNOS5. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* EXYNOS: Fix USB compiler warningRajeshwari Shinde2012-07-101-1/+0
| | | | | | | Fixed the compiler warning message. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
* EXYNOS: Add power Enable/Disable for USB-EHCIRajeshwari Shinde2012-07-091-0/+22
| | | | | | | | | This patch adds functions to enable/disable the power of USB host controller for EXYNOS5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* USB: EXYNOS: Set USB 2.0 HOST Link modeRajeshwari Shinde2012-07-091-0/+22
| | | | | | | This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* EXYNOS5: PINMUX: Added default pinumx settingsRajeshwari Shinde2012-07-072-1/+221
| | | | | | | | | | | | | This patch performs the pinmux configuration in a common file. As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is supported. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: add LCD and MIPI DSI clock interface.Donghwa Lee2012-05-151-0/+184
| | | | | | | | | To sets up lcd and mipi clock in EXYNOS display driver, added clock interface. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: definitions of system resgister and power management registers.Donghwa Lee2012-05-153-1/+103
| | | | | | | | | This is definitions of system registers and power mananagement registers for EXYNOS SoC. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: EXYNOS: Add support for Exynos5 based SoCsChander Kashyap2012-02-121-5/+203
| | | | | | | | Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of SoCs. This patch adds the support for Exynos5. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macroChander Kashyap2012-02-121-5/+1
| | | | | | | | | CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4) architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ to make it generic for exynos architecture. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos: Fix ARM Clock frequency calculationChander Kashyap2012-02-121-6/+9
| | | | | | | | | | Earliar ARM clock frequency was calculated by: MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL. It is fixed by calculating it as follows: ARMCLK=MOUTCORE / (DIVCORE + 1) / (DIVCORE2 + 1) Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5PC2XX: Rename S5pc2XX to exynosChander Kashyap2011-12-093-0/+330
As per new naming convention for Samsung SoC's, all Cortex-A9 and Cortex-A15 based SoC's will be classified under the name Exynos. Cortex-A9 and Cortex-A15 based SoC's will be sub-classified as Exynos4 and Exynos5 respectively. In order to better adapt and reuse code across various upcoming Samsung Exynos based boards, all uses of s5pc210 prefix/suffix/directory-names are renamed in this patch. s5pc210 is renamed as exynos4210 and S5PC210/s5pc210 suffix/prefix are renamed as exynos4/EXYNOS4. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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