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* arm: Fixed the offset for the no relocation.Zhong Hongbo2012-10-041-0/+1
| | | | | | | | When the u-boot address of destination equal to __start, no relocation. relocation offset(r9) = 0. Signed-off-by: Zhong Hongbo <bocui107@gmail.com> Tested-by: Stefano Babic <sbabic@denx.de>
* kirkwood: implement kw_sdram_size_adjustGerlando Falauto2012-10-031-0/+11
| | | | | | | | | | | | | | Size of the SDRAM chips might differ between any two (otherwise identical) instances of the same board. So add a function kw_sdram_size_adjust() which reads out the current ram size for a given bank, and adjusts the Kirkwood's SDRAM window size register accordingly. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com>
* kirkwood: implement kw_sdram_bs_set()Gerlando Falauto2012-10-031-0/+24
| | | | | | | | | | | | | | | | Some boards might be equipped with different SDRAM configurations. When that is the case, CPU CS Window Size Register (CS[0]n Size) should be set to the biggest value through board.cfg file; then its value can be fixed at runtime according to the detected SDRAM size. Therefore, implement kw_sdram_bs_set(). Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
* kirkwood: use c-struct for access to SDRAM addr decode registersHolger Brunck2012-10-031-6/+17
| | | | | | | | | | | Remove the defines and do this with a C-struct. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Marek Vasut <marex@denx.de> Acked-By: Prafulla Wadaskar <Prafulla@marvell.com>
* ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORKTom Rini2012-09-274-41/+51
| | | | | | | | - Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device. Signed-off-by: Tom Rini <trini@ti.com>
* mx25: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-062-9/+9
| | | | | | | | | | Define default SoC input clock frequencies for i.MX25 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Matthias Weisser <weisserm@arcor.de>
* MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDSMarek Vasut2012-09-041-3/+5
| | | | | | | | | | Use proper struct-based access for this register in the SPL code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* edminiv2: orion5x: fix GPIO inits and valuesAlbert ARIBAUD2012-09-031-0/+2
| | | | | | | | | Orion5x did not actually write GPIO output values or input polarities, and ED Mini V2 had bad or missing values for GPIO settings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* atmel: at91sam9x5: fix name error for spiBo Shen2012-09-011-2/+2
| | | | | | | Fix the name error Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mxs: Convert timeout parameter to 'unsigned int'fabio.estevam@freescale.com2012-09-011-2/+4
| | | | | | | | | For representing a timeout value, it makes more sense to pass it as 'unsigned int'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* gpio: add gpio api support to mx27 (v4)trem2012-09-011-5/+6
| | | | | | | The gpio api has been tested on an armadeus apf27. Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr> Acked-by: Stefano Babic <sbabic@denx.de>
* mxs: Rename 'mx28_dram_init' to 'mxs_dram_init'Otavio Salvador2012-09-011-2/+2
| | | | | | | | | | | | | | | | The DRAM initialization, after SPL has complete, is exactly the same for all mxs SoCs so we should name it accordinly. The following boards has been changed: * apx4devkit * m28evk * mx28evk * sc_sps_1 Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
* mxs: Only build internal Ethernet controller for i.MX28Otavio Salvador2012-09-011-1/+1
| | | | | | | | | The internal Ethernet controller is only available on i.MX28 processors so it needs to use CONFIG_MX28 guardian to avoid having this code called in others. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* MX28: config: Allow different target generation in elftosb callOtavio Salvador2012-09-011-0/+0
| | | | | | | | The elftosb call needs to use a target param specific for i.MX28. This patch allow for later addition of i.MX233. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* mx25: Enable dcacheBenoît Thébaudeau2012-09-011-0/+8
| | | | | | | | | Now that the main i.MX features work fine with dcache enabled, enabled it by default if CONFIG_SYS_DCACHE_OFF is not defined. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: Shuffle around the power management codeMarek Vasut2012-09-011-6/+3
| | | | | | | | | | Move some function calls to a more appropriate place, so they're called only when needed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: Drop the cp15 reconfiguration from SPLMarek Vasut2012-09-011-42/+0
| | | | | | | | | | | | | | | The SPL doesn't need the CP15 reconfiguration, as that's what the BootROM does for us already. Moreover, when the CP15 is reconfigured and the code returns control to BootROM, the USB boot works no more. Remove the code and allow [1] to work properly as well. [1] http://git.bfuser.eu/?p=marex/mxsldr.git;a=summary Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mxs: Convert sys_proto.h prefixes to 'mxs'Otavio Salvador2012-09-013-20/+20
| | | | | | | The sys_proto.h functions (except the boot modes) are compatible with i.MX233 and i.MX28 so we use 'mxs' prefix for its methods. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Remove not required include of iomux-mx28.hOtavio Salvador2012-09-011-1/+0
| | | | | | | The iomux-mx28.h include is not required on spl_mem_init.c so it has been droped. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Remove not required explicit iomux-mx28.h includeOtavio Salvador2012-09-011-1/+0
| | | | | | | | The iomux header is included on sys_proto.h so to avoid SoC specific header inclusion. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* davinci, c6x: Always use C version of reset codeTom Rini2012-09-013-84/+34
| | | | | | | | | We can safely use the same reset code written in C for both Davinci and C6X platforms. In addition the C version of the code is marginally smaller on Davinci. Tested-by: Matt Porter <mporter@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* da8xx/hawkboard: Add support for ohci host controllerSughosh Ganu2012-09-011-0/+5
| | | | | | | | | | Also enable the ohci port on hawkboard. These additions result in an increased u-boot size -- adjust the same accordingly in the board's config. Move the usb header for da8xx platforms under arch-davinci. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
* i.MX28: bug fixes in PMU configuration codeStathis Voukelatos2012-09-011-6/+6
| | | | | | Signed-off-by: Stathis Voukelatos <stathis.voukelatos@linn.co.uk> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com>
* MX28: Move the u-boot.bd info CPUDIR/SOCDIRMarek Vasut2012-09-011-0/+14
| | | | | | | | This gets us rid of duplication of the same file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCsOtavio Salvador2012-09-012-1/+1
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Clarify why we poweroff in case of brownout in 5v conflictOtavio Salvador2012-09-011-0/+4
| | | | | | | | If VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes unreliable but this wasn't clear on code so a comment has been added to clarify it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador2012-09-016-110/+110
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-016-108/+108
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: prefix register acessor macros with 'mxs' prefixOtavio Salvador2012-09-013-8/+8
| | | | | | | As the register accessing mode is the same for all i.MXS SoCs we ought to use 'mxs' prefix intead of 'mx28'. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador2012-09-0112-1/+1
| | | | | | | | | Most code can be shared between i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: use a clear name for DDR2 initializationOtavio Salvador2012-09-011-6/+6
| | | | | | | | | The mx28 prefix has been added to the initialization data and function so it is clear by which SoC it is used as i.MX233 will have a specific one. While on that, we also change it to static. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* MX28: extend print_cpuinfo() to use chip informationOtavio Salvador2012-09-011-2/+36
| | | | | | | The information now is gathered from HW_DIGCTL_CHIPID register and includes the chip modem and revision on the output. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* Enable the EMAC clock in at91_macb_hw_init().Markus Hubig2012-09-011-0/+4
| | | | | | Signed-off-by: Markus Hubig <mhubig@imko.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* arm : Atmel : add at91sam9x5ek board supportBo Shen2012-09-013-2/+243
| | | | | | | | | | | | Add at91sam9x5ek board support, this board support the following SoCs AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35 Using at91sam9x5ek_nandflash to configure for the board Now only supports NAND with software ECC boot up Signed-off-by: Bo Shen <voice.shen@atmel.com> [move MAINTAINERS entry to right place] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* DaVinci DA8xx: fix set_cpu_clk_info()Laurence Withers2012-09-011-9/+14
| | | | | | | | | | | | | | | | | | | | | | For the DA8xx family of SoCs, the set_cpu_clk_info() function was not initialising the DSP frequency, leading to 'bdinfo' command output such as: [...snip...] ARM frequency = 300 MHz DSP frequency = -536870913 MHz DDR frequency = 300 MHz This commit provides a separate implementation of set_cpu_clk_info() for the DA8xx SoCs that initialises the DSP frequency to zero (since currently the DSP is not enabled by U-Boot on any DA8xx platform). The separate implementation is justified because there is no common code between DA8xx and the other SoC families. It is now much easier to understand the flow of the two separate functions. Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Hadli, Manjunath <manjunath.hadli@ti.com> Cc: Heiko Schocher <hs@denx.de>
* DaVinci DA8xx: replace magic number for DDR speedLaurence Withers2012-09-011-1/+2
| | | | | | | | | | Replace a magic number for the DDR2/mDDR PHY clock ID with a proper definition. In addition, don't request this clock ID on DA830 hardware, which does not have a DDR2/mDDR PHY (or associated PLL controller). Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
* arm/davinci/da850: add uart0 pinmuxMikhail Kshevetskiy2012-09-011-0/+5
| | | | | Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
* arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138Mikhail Kshevetskiy2012-09-011-7/+19
| | | | | | | | | follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Acked-by: Christian Riesch <christian.riesch@omicron.at> Tested-by: Christian Riesch <christian.riesch@omicron.at>
* da850/omap-l138: Add support to read u-boot image from MMC/SDLad, Prabhakar2012-09-011-0/+5
| | | | | | | | | | | | | | | DA850/OMAP-L138 does not support strict MMC/SD boot mode. SPL will be in SPI flash and U-Boot image will be in MMC/SD card. SPL will do the low level initialization and then loads the u-boot image from MMC/SD card. Define CONFIG_SPL_MMC_LOAD macro in the DA850/OMAP-L138 configuration file to enable this feature. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* arm, davinci: perform check for initializing global data and serial initLad, Prabhakar2012-09-011-6/+9
| | | | | | | | | | | initialize baudrate, flags, data and serial initialization, only when CONFIG_SPL_LIBCOMMON_SUPPORT is defined. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
* da850/omap-l138: Add MMC support for DA850/OMAP-L138Lad, Prabhakar2012-09-011-0/+11
| | | | | | | | | This patch adds support for MMC/SD on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* Consolidate bootcount code into drivers/bootcountStefan Roese2012-09-011-26/+0
| | | | | | | | | | | | | | | | | | | This patch moves all bootcount implementations into a common directory: drivers/bootcount. The generic bootcount driver is now usable not only by powerpc platforms, but others as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Manfred Rudigier <manfred.rudigier@omicron.at> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de> Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com> Tested-by: Christian Riesch <christian.riesch@omicron.at> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* ARM: mx28: Remove CONFIG_ARCH_CPU_INITFabio Estevam2012-07-071-2/+0
| | | | | | | | | No need to define CONFIG_ARCH_CPU_INIT. All mx28 based boards should use arch_cpu_init(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* SPL: ARM: spear: Add SPL support for SPEAr600 platformStefan Roese2012-07-0710-7/+1480
| | | | | | | | | | | | This patch adds SPL support for SPEAr600. Currently only SNOR (Serial NOR) flash support is included. Other boot devices (NAND, MMC, USB ...) may be added with later patches. Tested on the STM SPEAr600 evaluation and x600 SPEAr600 boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
* SPEAr: explicitly select clk src for UARTShiraz Hashim2012-07-071-1/+6
| | | | | | | | | | UART in u-boot intends to run on 48MHz clock supplied by USB PLL. Explicitly select the intended clock source. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* SPEAr: Add basic arch related support for SPEAr SoCsVipin KUMAR2012-07-072-1/+84
| | | | | | | | | | | Earlier, architecture specific init code was mixed with board initialization code in board/spear/... This patch updates architecture support for SPEAr in latest u-boot and prints the SoC information. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* kirkwood: add save functionality kirkwood_mpp_conf functionValentin Longchamp2012-07-071-1/+9
| | | | | | | | | | | | | | If a second non NULL argument is given to the kirkwood_mpp_conf function, it will be used to store the current configuration of the MPP registers. mpp_save must be a preallocated table of the same size as mpp_list and it must be zero terminated as well. A later call to kirkwood_mpp_conf function with this saved list as first (mpp_conf) argment will set the configuration back. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* i.MX28: Add function to adjust memory parametersMarek Vasut2012-07-071-0/+8
| | | | | | | | | | | | | | This function can be overridden at run-time and allows implementors of new boards based on the i.MX28 chip to fine-tune the memory params. It is possible to write into the dram_vals array because when the SPL runs, it is located SRAM. Therefore the location is writable. There is no possibility of these data to be read-only. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com>
* DaVinci: fix ddr2 vtp i/o calibrationTroy Kisky2012-07-071-4/+3
| | | | | | | | | | | | | | | | | | | | | Previously, only the low 5 bits (NCH) were being transfered from DDRVTPR to DDRVTPIOCR, the bits 5-9 where zeroed. VTP_RECAL should be bit 15, not 18. The only mainline board affected by this change is davinci_sonata. The other Davinci boards define CONFIG_SKIP_LOWLEVEL_INIT. However, if the program that loads u-boot on these boards copied the code from u-boot, they will need fixed as well. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Please get tested by acks before applying, where tested by means an overnight memory test. Thanks Troy
* i.MX28: Avoid redefining serial_put[cs]()Marek Vasut2012-05-151-0/+2
| | | | | | | | | | | | Do not define serial_putc() and serial_puts() calls if CONFIG_SPL_SERIAL_SUPPORT is set. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
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